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EN25F80_1 Datasheet, PDF (35/35 Pages) Eon Silicon Solution Inc. – 8 Megabit Serial Flash Memory with 4Kbytes Uniform Sector
Revisions List
EN25F80
Revision No Description
Date
A
Initial release
2006/11/02
B
Add 8 pins PDIP package on page1,page31 and page 32
2006/12/01
C
Change Table 8. DC Characteristics VIL Max 0.3 VCC to 0.2 VCC on page 23 2007/02/07
1. Add 8 Lead PDIP in Figure 1. Connection Diagram on page 2.
2. Change Table 7 Write Inhibit Voltage (Max) from 2V to 2.5V
D
on page 22
2007/05/16
3. Change Table 10. 100MHz AC Characteristics tCLQV from 6 ns to 8 ns on
page 24
1. Update the Table 6. Status Register Bit Locations on page 10.
2. Modify the Figure 17 on page 18 for the starting point of tRES2
3. Modify the Figure 18 on page 19
E
(1) revise the manufacture ID to 1Ch
2007/11/23
(2) the number of clock count to cover the manufacture ID should be 31 to
38 and the last clock to clock out device ID is 46.
4. Modify the Figure 19 in page 20, the clock count to cover the device ID
should be from 15 to 31
1. Add Eon products’ New top marking “cFeon“ information on page 1.
2. Add the description “Serial Interface Architecture “and modify active
current (typical) from 5mA to 12mA on page 2.
3. List the Note 4 for 90h command in Table 4 on page 10.
4. Update Table 6. Status Register Bit Locations on page 11.
5. Add Table 7. OTP Sector Address on page 22.
6. Add Note “ Vcc (max) is 3.6V and Vcc (min) is 2.7V “ in Table 8 on page
23.
F
7. Modify ICC3 from “Q = open” to “ DQ = open “ in Table 9 on page 24
2008/11/10
8. Correct the typo “tCLH to tCH” “tCLL to tCL” ”tHHQZ to tHHQX” in
Table 11 and Table 12 on page 25 and 26.
9. Modify Storage Temperature from “-65 to + 125” to “-65 to +150”
on page 28
10.Delete Latch up Characteristics Table from version E.
11.Modify official name from 209mil to 208mil and delete dimension
“ c “ in Figure 26 on page 30.
12. Modify Figure 28. VDFN8 ( 5x6mm ) dimension A from 0.80 to 0.75 on
page 31.
1. Update Page program, Sector, Block and Chip erase time (typ.)
parameter on page 2 and 26.
(1). Page program: from 1.5ms to 1.3m
(2). Sector erase: from 0.15s to 0.09s
G
(3). Block erase: from 0.8s to 0.4s
2. Add the 8-pin 150mil SOP package information on page 2, 30 and 34.
2009/04/22
3. Update the Protected Area Sizes definition of BP2 BP1 and BP0
in table 3 on page 8.
4. Add the description of OTP erase command on page 9 and page 22.
5. Remove the Block Erase “52h” command on page 9, 16 and 17.
1. Update Block and Chip erase time (typ.) parameter on page 2, 25 and 26.
(1). Block erase: from 0.4s to 0.5s
H
(2). Chip erase: from 10s to 8s.
2009/07/16
2. Correct the Protected Area Sizes definition of BP2 BP1 and BP0
in table 3 on page 8.
I
Modify Table 9. DC Characteristics ICC1 (Standby) and ICC2 (Deep Power- 2009/10/16
down) Current from 5µA to 20µA on page 24.
J
Modify Icc4, Icc5, Icc6 and Icc7 on page 24.
2010/03/10
K
Modify D2 of VDFN8(5x6) from 4.23 to 3.40 on page 32.
2010/05/31
This Data Sheet may be revised by subsequent versions
35
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc.,
Rev. K, Issue Date: 2010/05/31
www.eonssi.com