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EN25QH16 Datasheet, PDF (51/62 Pages) Eon Silicon Solution Inc. – 16 Megabit Serial Flash Memory with 4Kbyte Uniform Sector
EN25QH16
Table 14. AC Characteristics
(Ta = - 40°C to 85°C; VCC = 2.7-3.6V)
Symbol Alt
Parameter
Min Typ
Max
Serial Clock Frequency for:
FAST_READ, PP, SE, BE, DP, RES, WREN,
D.C.
-
104
FR
fC
WRDI, WRSR
Serial Clock Frequency for:
RDSR, RDID, Dual Output Fast Read and Quad D.C.
-
80
I/O Fast Read
fR
Serial Clock Frequency for READ
D.C.
-
50
tCH 1
Serial Clock High Time
4
-
-
tCL1
Serial Clock Low Time
4
-
-
tCLCH2
Serial Clock Rise Time (Slew Rate)
0.1
-
-
tCHCL 2
Serial Clock Fall Time (Slew Rate)
0.1
-
-
tSLCH
tCSS CS# Active Setup Time (Relative to CLK)
5
-
-
tCHSH
CS# Active Hold Time (Relative to CLK)
5
-
-
tSHCH
CS# Not Active Setup Time (Relative to CLK)
5
-
-
tCHSL
CS# Not Active Hold Time (Relative to CLK)
5
-
-
tSHSL
tCSH
CS# High Time for read
CS# High Time for program/erase
15
50
-
-
tSHQZ 2
tDIS Output Disable Time
-
-
6
tCLQX
tHO Output Hold Time
0
-
-
tDVCH
tDSU Data In Setup Time
2
-
-
tCHDX
tDH Data In Hold Time
5
-
-
tHLCH
HOLD# Low Setup Time ( relative to CLK )
5
tHHCH
HOLD# High Setup Time ( relative to CLK )
5
tCHHH
HOLD# Low Hold Time ( relative to CLK )
5
tCHHL
HOLD# High Hold Time ( relative to CLK )
5
tHLQZ 2
tHZ HOLD# Low to High-Z Output
6
tHHQX 2
tLZ HOLD# High to Low-Z Output
6
tCLQV
tV
Output Valid from CLK
-
-
8
tWHSL3
Write Protect Setup Time before CS# Low
20
-
-
tSHWL3
Write Protect Hold Time after CS# High
100
-
-
tDP 2
tRES1 2
tRES2 2
CS# High to Deep Power-down Mode
-
-
3
CS# High to Standby Mode without Electronic
Signature read
-
-
3
CS# High to Standby Mode with Electronic
Signature read
-
-
1.8
tW
Write Status Register Cycle Time
-
15
50
tPP
Page Programming Time
-
1.3
5
tSE
Sector Erase Time
-
0.06
0.3
tBE
Block Erase Time
-
0.4
2
tCE
Chip Erase Time
-
12
30
tSR
Software Reset WIP = write operation
-
-
28
Latency
WIP = not in write operation
-
-
0
Note: 1. tCH + tCL must be greater than or equal to 1/ fC
2. Value guaranteed by characterization, not 100% tested in production.
3. Only applicable as a constraint for a Write status Register instruction when Status Register Protect Bit is set at 1.
Unit
MHz
MHz
MHz
ns
ns
V / ns
V / ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
ms
ms
s
s
s
µs
µs
This Data Sheet may be revised by subsequent versions
51
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc.,
Rev. H, Issue Date: 2012/01/30
www.eonssi.com