EN25Q32A Datasheet, PDF(34/52 Page) Eon Silicon Solution Inc. – 32 Megabit Serial Flash Memory with 4Kbyte Uniform Sector

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EN25Q32A Datasheet, PDF (34/52 Pages) Eon Silicon Solution Inc. – 32 Megabit Serial Flash Memory with 4Kbyte Uniform Sector

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EN25Q32A

Figure 19.1 Chip Erase Sequence under EQIO Mode

Deep Power-down (DP) (B9h)

Executing the Deep Power-down (DP) instruction is the only way to put the device in the lowest con-

sumption mode (the Deep Power-down mode). It can also be used as an extra software protection

mechanism, while the device is not in active use, since in this mode, the device ignores all Write,

Program and Erase instructions.

Driving Chip Select (CS#) High deselects the device, and puts the device in the Standby mode (if there

is no internal cycle currently in progress). But this mode is not the Deep Power-down mode. The Deep

Power-down mode can only be entered by executing the Deep Power-down (DP) instruction, to reduce

the standby current (from ICC1 to ICC2, as specified in Table 9.)

Once the device has entered the Deep Power-down mode, all instructions are ignored except the

Release from Deep Power-down and Read Device ID (RDI) instruction. This releases the device from

this mode. The Release from Deep Power-down and Read Device ID (RDI) instruction also allows the

Device ID of the device to be output on Serial Data Output (DO).

The Deep Power-down mode automatically stops at Power-down, and the device always Powers-up in

the Standby mode. The Deep Power-down (DP) instruction is entered by driving Chip Select (CS#) Low,

followed by the instruction code on Serial Data Input (DI). Chip Select (CS#) must be driven Low for the

entire duration of the sequence.

The instruction sequence is shown in Figure 20. Chip Select (CS#) must be driven High after the eighth

bit of the instruction code has been latched in, otherwise the Deep Power-down (DP) instruction is not

executed. As soon as Chip Select (CS#) is driven High, it requires a delay of tDP before the supply

current is reduced to ICC2 and the Deep Power-down mode is entered.

Any Deep Power-down (DP) instruction, while an Erase, Program or Write cycle is in progress, is

rejected without having any effects on the cycle that is in progress.

This Data Sheet may be revised by subsequent versions

or modifications due to changes in technical specifications.

Rev. C, Issue Date: 2009/10/13

www.eonssi.com

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