EN25Q64_11 Datasheet, PDF (29/60 Pages) Eon Silicon Solution Inc. – 64 Megabit Serial Flash Memory with 4Kbyte Uniform Sector

EN25Q64
as 4-bit instead of previous 1-bit.
The sequence of issuing Quad Input/Output FAST_READ (EBh) instruction is: CS# goes low ->
sending Quad Input/Output FAST_READ (EBh) instruction -> 24-bit address interleave on DQ₃, DQ₂,
DQ₁ and DQ₀ -> 6 dummy clocks -> data out interleave on DQ₃, DQ₂, DQ₁ and DQ₀ -> to end Quad
Input/Output FAST_READ (EBh) operation can use CS# to high at any time during data out, as shown
in Figure 15.
The instruction sequence is shown in Figure 15.1 while using the Enable Quad Peripheral Interface mode
(EQPI) (38h) command.
Figure 15. Quad Input / Output Fast Read Instruction Sequence Diagram
Figure 15.1. Quad Input / Output Fast Read Instruction Sequence under EQPI Mode
This Data Sheet may be revised by subsequent versions
29
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc.,
Rev. J, Issue Date: 2011/07/07
www.eonssi.com