EN25P64 Datasheet, PDF (19/34 Pages) Eon Silicon Solution Inc. – 64 Megabit Uniform Sector, Serial Flash Memory

EN25P64
Figure 12. Sector Erase Instruction Sequence Diagram
Bulk Erase (BE) (C7h)
The Bulk Erase (BE) instruction sets all bits to 1 (FFh). Before it can be accepted, a Write Enable
(WREN) instruction must previously have been executed. After the Write Enable (WREN) instruction
has been decoded, the device sets the Write Enable Latch (WEL).
The Bulk Erase (BE) instruction is entered by driving Chip Select (CS#) Low, followed by the
instruction code on Serial Data Input (DI). Chip Select (CS#) must be driven Low for the entire
duration of the sequence.
The instruction sequence is shown in Figure 13. Chip Select (CS#) must be driven High after the
eighth bit of the instruction code has been latched in, otherwise the Bulk Erase instruction is not exe-
cuted. As soon as Chip Select (CS#) is driven High, the self-timed Bulk Erase cycle (whose duration is
tBE) is initiated. While the Bulk Erase cycle is in progress, the Status Register may be read to check
the value of the Write In Progress (WIP) bit. The Write In Progress (WIP) bit is 1 during the self-timed
Bulk Erase cycle, and is 0 when it is completed. At some unspecified time before the cycle is
completed, the Write Enable Latch (WEL) bit is reset.
The Bulk Erase (BE) instruction is executed only if all Block Protect (BP2, BP1, BP0) bits are 0. The
Bulk Erase (BE) instruction is ignored if one, or more, sectors are protected.
Figure 13. Bulk Erase Instruction Sequence Diagram
This Data Sheet may be revised by subsequent versions
19
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc.,
Rev. D, Issue Date: 2009/1/8
www.eonssi.com.