V6116 Datasheet, PDF(1/15 Page) EM Microelectronic - MARIN SA – Digitally Programmable 2, 4 and 8 Mux LCD Driver

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V6116 Datasheet, PDF (1/15 Pages) EM Microelectronic - MARIN SA – Digitally Programmable 2, 4 and 8 Mux LCD Driver

EM MICROELECTRONIC - MARIN SA

V6116

Digitally Programmable 2, 4 and 8 Mux LCD Driver

Description

The V6116 is a universal low multiplex LCD driver. The 2,

4 and 8 way multiplex is digitally programmable by the

command byte. The display refresh is handled on chip via

2 selectable 8 x 40 RAMs which holds the LCD content

driven by the driver. LCD pixels (or segments) are

addressed on a one to one basis with the 8 x 40 bit RAM

(a set bit corresponds to an activated LCD pixel). Due to

the very low driver impedance, the V6116 is designed to

be proved in large pixel size applications. Using the TAB

tools, the V6116 can be easily cascaded and it can be

provided in very large display applications by using the

column only driver command COL . The very low current

consumption, the extremely large voltage range and the

extremely wide temperature range give the V6116 a real

advantage for a wide range of applications.

Versions

Â V6116 060 with internal bias resistor

Â V6116 020 without internal bias resistor

Â When using the version 020 (without internal bias

resistor) in mux mode 4, V3 has to be connected to

VSS

Features

Â V6116 mux mode 2 with 2 rows and 38 columns

Â V6116 mux mode 4 with 4 rows and 36 columns

Â V6116 mux mode 8 with 8 rows and 32 columns

Â Low dynamic current, 250 ÂµA max.

Â Low standby current, 1 ÂµA max. at +25Â°C

Â Voltage bias and mux signal generation on chip

Â 2 display RAMs addressable as 8 x 40 words

Â Display refresh on chip, dual RAM for display storage:

2 x (2x38; 4x36; 8x32)

Â Column driver only mode to have 40 column outputs

Dual RAM for display storage: 2x (2; 4; 8x40)

Â Crossfree cascadable for large LCD applications

Â Separate logic and LCD supply voltage pins

Â Wide power supply range: VDD: 2 to 6V, VLCD: 2 to 9V

Â Blank function for LCD blanking by data, BLANK bit

and STR signal (STR only if internal bias)

Â All segments ON by data and SET bit

Â Bit mapped

Â Serial interface

Â No busy state

Â LCD updating synchronized to the LCD refresh signal

Â TAB and bumped die form delivery. Other form

delivery on request

Â -40 to + 85 Â°C temperature range

Typical Operating Configuration

Pad Assignment

QFP52

Fig. 1

See Fig. 16 for TAB pinout

Fig. 2

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