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| EMC326SP16AJ Datasheet, PDF (42/64 Pages) Emerging Memory & Logic Solutions Inc – 2Mx16 bit CellularRAM | |||
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Preliminary
EMC326SP16AJ
2Mx16 CellularRAM
Figure 31. 4-Word Burst READ Operation - Fixed Latency
VIH
CLK
VIL
A[20:0] VIH
VIL
ADV# VIH
VIL
VIH
CE#
VIL
VIH
OE#
VIL
WE# VIH
VIL
VIH
LB#/UB#
VIL
VOH
WAIT
VOL
DQ[15:0] VOH
VOL
High-Z
High-Z
tCLK
tSP
tHD
Valid Address
tAVH tAA
tSP tHD
tCSP
tAADV
tCEM
tCO
tSP tHD
tOLZ
tBOE
tKHKL
tSP
tCEW
tKHTL
tACLK
tKOH
Valid
Output
Valid
Output
READ Burst Identified
(WE# = HIGH)
tKP tKP
tHD tCBPH
tHZ
tOHZ
tHD
Valid
Output
Valid
Output
High-Z
Donât Care
Undefined
Note:
1. Non-default BCR settings: Fixed latency; latency code two (three clocks); WAIT active LOW; WAIT asserted during delay.
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