EMD12324P Datasheet, PDF (16/44 Pages) Emerging Memory & Logic Solutions Inc – 512M: 16M x 32 Mobile DDR SDRAM

Preliminary
EMD12324P
512M: 16M x 32 Mobile DDR SDRAM
Table 14: Register Programmed with Extended MRS
Address BA1
BA0 A12 ~ A10/AP A9 A8 A7 A6 A5
Function
Mode Select
RFU^*1
DS
NOTE :
1. RFU(Reserved for future use) should stay “0” during MRS and EMRS cycle.
A4 A3
RFU^*1
A2 A1 A0
PASR
Table 15: EMRS for PASR(Partial Array Self Refresh) & DS(Driver Strength)
Mode Select
Driver Strength
PASR
BA1 BA0
MODE
A6 A5
Driver
Strength
A2 A1 A0
Size of Refreshed Array
0
0
Normal MRS
0
0
Full
0
0
0
Full Array
0
1
Reserved
0
1
1/2
0
0
1
1/2 of Full Array
1
0
EMRS for DDR SDRAM
1
0
1/4
0
1
0
1/4 of Full Array
1
1
Reserved
1
1
1/8
0
1
1
Reserved
1
0
0
Reserved
1
0
1
Reserved
1
1
0
Reserved
1
1
1
Reserved
Table 16: Internal Temperature Compensated Self Refresh (TCSR)
Self Refresh Current (I_DD 6)
Temperature Range
Unit
Full Array
1/2 of Full Array
1/4 of Full Array
Max 85
600
500
450
£
©
Max 45
350
250
200
£
NOTE :
1. In order to save power consumption, Mobile DDR SDRAM includes the internal temperature sensor and control units to control the
self refresh cycle automatically according to the two temperature range : Max 85 , Max 45


2. If the EMRS for external TCSR is issued by the controller, this EMRS code for TCSR is ignored.
3. It has +/- 5 tolerance.

16
Rev 0.0