EDE5132AABG Datasheet, PDF (60/74 Pages) Elpida Memory – 512M bits DDR2 SDRAM

EDE5132AABG
T-1
/CK
CK
Command
A10 = 1
Posted
READ
DQS, /DQS
DQ
T0
T1
T2
T3
AL = 2
≥ tRAS(min.)
CL = 3
RL = 5
tRC (min.)
T4
T5
T6
T7
NOP
≥ tRP
out0 out1 out2 out3
Tn
ACT
Auto precharge begins
Burst Read with Auto Precharge Followed by an Activation to the Same Bank (tRAS lockout case)
(RL = 5, BL = 4 (AL = 2, CL = 3))
T0
T1
/CK
CK
Command
A10 = 1
Posted
READ
DQS, /DQS
T2
T3
T4
≥ tRAS(min.)
NOP
AL = 2
CL = 3
RL = 5
DQ
≥tRC
T5
T6
T7
T8
ACT
NOP
tRP (min.)
out0 out1 out2 out3
Auto precharge begins
Burst Read with Auto Precharge Followed by an Activation to the Same Bank (tRP limit)
(RL = 5, BL = 4 (AL = 2, CL = 3, tRTP ≤ 2tCK))
T0
T1
T2 T3
T4
T5
T6 T7
T8
T9 T10 T11
CK
/CK
A10 = 1
Command
READ
NOP
ACT
≥tRAS (min.)
DQS, /DQS
DQ
AL = 2
RL = 5
CL = 3
≥tRC
≥tRP
out0 out1 out2 out3 out4 out5 out6 out7
Auto precharge begins
Burst Read with Auto Precharge Followed by an Activation to the Same Bank
(RL = 5, BL = 8 (AL = 2, CL = 3, tRTP ≤ 2tCK))
Preliminary Data Sheet E1115E40 (Ver. 4.0)
60