EDS1232AATA-75L-E Datasheet, PDF (49/53 Pages) Elpida Memory – 128M bits SDRAM (4M words x 32 bits)

EDS1232AATA
Power Down Mode
CLK
CKE
/CS
/RAS
CKE Low
/CAS
/WE
BS
Address
A10=1
DQM
DQ (input)
DQ (output)
tRP
Precharge command Power down entry
If needed
Initialization Sequence
R: a
High-Z
Power down cycle
Power down
mode exit
/RAS-/CAS delay = 3
Active Bank 0 /CAS latency = 3
Burst length = 4
= VIH or VIL
CLK
CKE
/CS
/RAS
/CAS
/WE
Address
DQM
DQ
0 1 2 3 4 5 6 7 8 9 10
VIH
48 49 50 51 52 53 54 55
valid
VIH
tRP
tRC
All banks
Precharge
Auto Refresh
Auto Refresh
code
Valid
High-Z
tRC
lMRD
Mode register
Set
Bank active
If needed
Data Sheet E0386E40 (Ver. 4.0)
49