ECS1232ECCN-A Datasheet, PDF (37/48 Pages) Elpida Memory – 128M bits SDRAM Bare Chip

ECS1232ECCN-A
Write command to Precharge command interval (same bank)
When the precharge command is executed for the same bank as the write command that preceded it, the minimum
interval between the two commands is 1 clock. However, if the burst write operation is unfinished, the input data
must be masked by means of DQM for assurance of the clock defined by tDPL.
CLK
Command
DQM
WRIT
PRE/PALL
DQ
in A0
in A1
in A2
E _tDPL
WRITE to PRECHARGE Command Interval (same bank) (BL = 4 (To stop write operation))
O_CLK
L ^Command
WRIT
PRE/PALL
DQM
DQ
in A0
in A1
in A2
in A3
tDPL
Product ^{WRITE to PRECHARGE Command Interval (same bank) (BL = 4 (To write all data))}
Preliminary Data Sheet E0780E20 (Ver. 2.0)
37