EDS2532EEBH-9ATT Datasheet, PDF (34/50 Pages) Elpida Memory – 256M bits SDRAM WTR (Wide Temperature Range)

EDS2532EEBH-9ATT
Read with auto precharge to Read command interval
1. Different bank: When some banks are in the active state, the second read command (another bank) is executed.
Even when the first read with auto-precharge is a burst read that is not yet finished, the data read by the second
command is valid. The internal auto-precharge of one bank starts at the next clock of the second command.
CLK
Command
BS
READA
READ
DQ
out A0 out A1 out B0
bank0
Read A
bank3
Read
E _{Note: Internal auto-precharge starts at the timing indicated by " ".}
out B1
CL= 3
BL = 4
Read with Auto Precharge to Read Command Interval (Different bank)
2. Same bank: The consecutive read command (the same bank) is illegal.
O_{Write with auto precharge to Write command interval}
1. Different bank: When some banks are in the active state, the second write command (another bank) is executed.
In the case of burst writes, the second write command has priority. The internal auto-precharge of one bank
L ^{starts 2 clocks later from the second command.}
CLK
Command
BS
WRITA
WRIT
DQ
in A0
in A1
in B0
in B1
in B2
P_bank0
Write A
bank3
Write
Note: Internal auto-precharge starts at the timing indicated by " ".
in B3
r ^{Write with Auto Precharge to Write Command Interval (Different bank)}
oduct ^{2. Same bank: The consecutive write command (the same bank) is illegal.}
BL= 4
Data Sheet E0821E20 (Ver. 2.0)
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