EDD2508AKTA-5-E Datasheet, PDF (30/48 Pages) Elpida Memory – 256M bits DDR SDRAM (32M words x 8 bits, DDR400)

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t0
t1
t2
CK
/CK
tn
tn+1
tn+2
tn+3
tn+4
tn+5
Command
ACT
NOP
ACT NOP
WRIT WRIT
NOP
Address
Row0
Row1
Column A Column B
BA
DQ
DQS
Bank0
Active
inA0 inA1 inB0 inB1 inB2 inB3
Bank0
Write
Bank3
Write
Bank3
Active
WRITE to WRITE Command Interval (different bank)
BL = 4
Bank0, 3
Preliminary Data Sheet E0609E20 (Ver. 2.0)
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