EDE5116AJSE-LI Datasheet, PDF (24/76 Pages) Elpida Memory – 512M bits DDR2 SDRAM

EDE5116AJSE-LI
Block Diagram
CK
/CK
CKE
Bank 3
E^{A0 to A12, BA0, BA1}
Mode
register
O_/CS
L^/RAS
Row
address
buffer
and
refresh
counter
Column
address
buffer
Bank 2
Bank 1
Memory cell array
Bank 0
Sense amp.
Column decoder
/CAS
/WE
and
burst
counter
Data control circuit
Latch circuit
P_{CK, /CK}
DLL
Input & Output buffer
roduct _DQ
DQS, /DQS
ODT
UDM, LDM
Data Sheet E1171E40 (Ver. 4.0)
24