E521.40 Datasheet, PDF (38/84 Pages) ELMOS Semiconductor AG – Transceiver compliant with PSI5 standard v1.3 and v2.1

2 Channel Multi-Mode PSI5 Transceiver
Production Data – Apr 27, 2016
E521.40
SPI Format
Each device is controlled with a 16 bit control command, see following chapters.
The command is stored in a command register after the rising edge of NCS. The response consists of a 16 bit word
which contains the before requested information like e.g. diagnostic or output state.
Response after Reset or Communication Error
In case of reset or communication error (not valid commands, number of clocks not multiples of 16) following
response will be sent in the next valid SPI frame: "0x0000". The execution of not valid commands is blocked and
command with NCS low without clock are ignored.
Order of MSB/LSB Bit
MSB is sent first.
CRC
SPI Packet Frames from transceiver to μController include a XCRC (see 6.2.5).
Daisy Chain
Daisy chain operation is supported.
6.2.3.1 Error Handling
Figure 6.2.3.1-1: SPI Error Handling Example 1
1: Examples invalid command for 'Read Sensor Data 16bit':
Figure 6.2.3.1-2: SPI Error Handling Example 2
4a: Example: Command 'SPI_Read_Register' including invalid address A[5:0]:
Figure 6.2.3.1-3: SPI Error Handling Example 3
4b: Example: Command 'SPI_Read_Register' including Stuff 0 (frame n):
Figure 6.2.3.1-4: SPI Error Handling Example 4
Elmos Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
Elmos Semiconductor AG
Data Sheet
38 / 84
QM-No.: 25DS0110E.04