GD25LQ256 Datasheet, PDF (25/68 Pages) ELM Electronics – 1.8V Uniform Sector Dual and Quad Serial Flash

GD25LQ256CWIGx 1.8V Uniform Sector Dual and Quad Serial Flash
7.10. Dual Output Fast Read (3BH)
http://www.elm-tech.com
The Dual Output Fast Read command is followed by 3-byte address (A23-A0) or a 4-byte address (A31-A0)
and a dummy byte, each bit being latched in during the rising edge of SCLK, then the memory contents are
shifted out 2-bit per clock cycle from SI and SO. The command sequence is shown in followed Figure11. The
first byte addressed can be at any location. The address is automatically incremented to the next higher address
after each byte of data is shifted out.
Figure 11. Dual Output Fast Read Sequence Diagram
Note: The device default is in 24-bit address mode. For 4-byte mode, the address length becomes 32-bit.
68 - 25
Rev.1.0