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MA1916 Datasheet, PDF (5/11 Pages) Dynex Semiconductor – Radiation Hard Reed-Solomon & Convolution Encoder
MA1916
CE_CLK (Convolution Encoder Clock)
The CE_CLK input drives the timing of the convolution
encoder. Data is read in on CE_IN on the rising edge of
CE_CLK and output on CE_OUT on both the rising and falling
edge of CE_CLK.
Note: The output data rate is twice the input data rate.
A 50% duty cycle clock is required. If this is provided by the
CLKS output, data can be read directly from RSE_OUT to the
CE_IN input (see figure 3).
CE_OUT (Convolution Encoder Output)
This signal carries the output data from the convolution
encoder. The data rate on CE_OUT is twice that of CE_IN.
CLK_OUT (Clock Out)
CLK_OUT is a buffered output of the CLK input signal. If
CLKS is connected to CE_CLK to drive the convolution
encoder, CE_OUT can be captured on the falling edge of
CLK_OUT.
DC CHARACTERISTICS AND RATINGS
Parameter
Supply Voltage
Input Voltage
Current Through Any Pin
Operating Temperature
Storage Temperature
Min
Max
-0.5
7
-0.3 VDD+0.3
-20
+20
-55
125
-65
150
Table 3: Absolute Maximum Ratings
Units
V
V
mA
°C
°C
Note: Stresses above those listed may cause permanent
damage to the device. This is a stress rating only and
functional operation of the device at these conditions, or at
any other condition above those indicated in the operations
section of this specification, is not implied. Exposure to
absolute maximum rating conditions for extended periods
may affect device reliability.
Symbol Parameter
Conditions
Min
Typ
Max Units
VDD Supply Voltage
-
4.5
5.0
5.5
V
VIH CMOS Input High Voltage
VDD = 5.5V
0.8 VDD
-
VDD
V
VIL CMOS Input Low Voltage
VDD = 5.5V
VSS
-
0.2 VDD
V
VOH CMOS Output High Voltage
VDD = 5V, IOH = -1.0mA
VDD-0.5
-
-
V
VOL CMOS Output Low Voltage
VDD = 5V, IOL = 4.0mA
-
-
0.4
V
IIL
Input Leakage Current
VDD = 5.5V, VIN = VSS or VDD
-10
-
10
µA
IPDL Input Pull-Down Current
VDD = 5.5V, VIN = VSS or VDD
-20
-
150
µA
IDD1 Static Power Supply Current
VDD = 5.5V
-
0.1
2.5
mA
IDD2 Dynamic Power Supply Current
CLK = 10MHz, VDD = 5.5V
-
3
10
mA
Notes: 1. VDD = 5V±10%, over full operating temperature range. 2. Total dose radiation not exceeding 1x105 Rads(Si)
3. Mil-Std-883, method 5005, subgroups 1, 2, 3
Table 4: DC Electrical Characteristics
AC CHARACTERISTICS
No. Parameter
Min. Max. Units
1 CLK hlgh to CLKS
2 CLK high to SYZ or SZY
3 SMC hold after CLK low
4 SMC setup to CLK low
5 MSG set up to CLKS high
6 MSG hold after CLKS high
7 MSG to RSE_OUT propagation delay
8 CLKS to RSE_OUT (SMC low)
9 CLK to CLK_OUT propagation delay
10 CE_IN setup to CE_CLK hlgh
11 CE_IN hold after CE_CLK high
12 CE_CLK to CE_OUT
13 CLK CYCLE TIME
-
25
-
30
0
-
30
-
10
-
10
-
-
30
-
25
-
25
10
-
10
-
-
25
100
-
Table 5: AC Electrical Characteristics
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note: Mil-Std-883, method 5005,
subgroups 9, 10, 11
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