MA3690 Datasheet, PDF (10/41 Pages) Dynex Semiconductor – 1553B Bus Controller/Remote Terminal

MA3690/1/3
FULL BUS CONTROLLER
To make use of the SOS chipset’s capabilities a processor-
based system would be more applicable. A block diagram of
such a system, using shared store technique is shown in
Figure 3. In this, the instruction word store would be alterable
by the processor for use in various system conditions, i.e. a
basic message table would initialy be set up with the processor
monitoring the results of execution from the report word store
and / or the interrupt request (IRQN) line. On detection of an
erroneous condition, the processor could write a new message
table to test the RT in error by, for example, a self test mode
command. The inclusion of automatic retry, with a maximum of
3 retries, in the instruction word, removes the requirement from
the processor to retry under simple RT faults, e.g., status bit
set.
Figure 3: Full Bus Controller
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