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AP7167_10 Datasheet, PDF (9/14 Pages) Diodes Incorporated – 1.2A LOW DROPOUT REGULATOR WITH POK
AP7167
1.2A LOW DROPOUT REGULATOR WITH POK
Application Notes
Input Capacitor
A 1μF ceramic capacitor is recommended to connect
between IN and GND pins to decouple input power supply
glitch and noise. The amount of the capacitance may be
increased without limit. A lower ESR (Equivalent Series
Resistance) capacitor allows the use of less capacitance,
while higher ESR type requires more capacitance. This
input capacitor should be located as close as possible to
the device to assure input stability and less noise. For
PCB layout, a wide copper trace is required for both IN
and GND.
Output Capacitor
The output capacitor is required to stabilize and help the
transient response of the LDO. The AP7167 is designed to
have excellent transient response for most applications
with a small amount of output capacitance. The AP7167 is
stable for all available types and values of output
capacitors ≥ 4.7μF. The device is also stable with multiple
capacitors in parallel, which can be of any type of value.
Additional capacitance helps to reduce undershoot and
overshoot during transient. This capacitor should be
placed as close as possible to OUT and GND pins for
optimum performance.
Adjustable Operation
The AP7167 provides output voltage from 0.8V to 5.0V
through external resistor divider as shown below.
VIN
IN
OUT
CIN
100kOhm
AP7167
R1
POK
FB
Enable EN
R2
GND
VOUT
COUT
The output voltage is calculated by:
VOUT
=
VREF⎜⎜⎝⎛1+
R1
R2
⎟⎟⎠⎞
Where VREF=0.8V (the internal reference voltage)
Rearranging the equation will give the following equation
to find the approximate resistor divider values:
R1
=
R2⎜⎜⎝⎛
VOUT
VREF
− 1⎟⎟⎠⎞
To maintain the stability of the internal reference voltage,
R2 needs to be kept smaller than 250kΩ.
No Load Stability
Other than external resistor divider, no minimum load is
required to keep the device stable. The device will remain
stable and regulated in no load condition.
ENABLE/SHUTDOWN Operation
The AP7167 is turned on by setting the EN pin high, and is
turned off by pulling it low. If this feature is not used, the
EN pin should be tied to IN pin to keep the regulator output
on at all time. To ensure proper operation, the signal
source used to drive the EN pin must be able to swing
above and below the specified turn-on/off voltage
thresholds listed in the Electrical Characteristics section
under VIL and VIH.
POWER-OK
The Power-Ok (POK) pin is an active high open-drain
output. It can be connected to any 5.5V or lower rail
through an external pull-up resistor. The recommended
sink current of POK pin is up to 4mA, so the pull-up
resistor for POK should be in the range of 10kΩ to 1MΩ. If
output voltage monitoring is not needed, the POK pin can
be left floating.
Current Limit Protection
When output current at OUT pin is higher than current limit
threshold, the current limit protection will be triggered and
clamp the output current to approximately 1.6A (1.2A min)
to prevent over-current and to protect the regulator from
damage due to overheating.
Short Circuit Protection
When OUT pin is short-circuited to GND or OUT pin
voltage is less than 200mV, short circuit protection will be
triggered and clamp the output current to approximately
750mA. This feature protects the regulator from over-
current and damage due to overheating.
AP7167
Document number: DS31252 Rev. 7 - 2
9 of 14
www.diodes.com
September 2010
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