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AP6508 Datasheet, PDF (9/14 Pages) Diodes Incorporated – 500kHz 21V 3A SYNCHRONOUS DC/DC BUCK CONVERTER
AP6508
500kHz 21V 3A SYNCHRONOUS DC/DC BUCK CONVERTER
Application Information
Theory of Operation
The AP6508 is a 3A current mode control, synchronous
buck regulator with built in power MOSFETs. Current
mode control assures excellent line and load regulation
and a wide loop bandwidth for fast response to load
transients. Figure. 2 depicts the functional block diagram
of AP6508.
The operation of one switching cycle can be explained as
follows. At the beginning of each cycle, HS (high-side)
MOSFET is off. The EA output voltage is higher than the
current sense amplifier output, and the current
comparator’s output is low. The rising edge of the 500kHz
oscillator clock signal sets the RS Flip-Flop. Its output
turns on HS MOSFET. The current sense amplifier is reset
for every switching cycle.
When the HS MOSFET is on, inductor current starts to
increase. The Current Sense Amplifier senses and
amplifies the inductor current. Since the current mode
control is subject to sub-harmonic oscillations that peak at
half the switching frequency, Ramp slope compensation is
utilized. This will help to stabilize the power supply. This
Ramp compensation is summed to the Current Sense
Amplifier output and compared to the Error Amplifier
output by the PWM Comparator. When the sum of the
Current Sense Amplifier output and the Slope
Compensation signal exceeds the EA output voltage, the
RS Flip-Flop is reset and HS MOSFET is turned off.
For one whole cycle, if the sum of the Current Sense
Amplifier output and the Slope Compensation signal does
not exceed the EA output, then the falling edge of the
oscillator clock resets the Flip-Flop. The output of the Error
Amplifier increases when feedback voltage (VFB) is lower
than the reference voltage of 0.807V. This also increases
the inductor current as it is proportional to the EA voltage.
If in one cycle the current in the power MOSFET does not
reach the COMP set current value, the power MOSFET
will be forced to turn off.
When the HS MOSFET turns off, the synchronous LS
MOSFET turns on until the next clock cycle begins. There
is a 520ns “dead time” between the HS turn off and LS
turn on that prevents the switches from “shooting through”
from the input supply to ground.
The voltage loop is internally compensated with the 50pF
and 200kΩ RC network. The maximum EAMP voltage
output is precisely clamped at 2.1V.
Internal Regulator
Most of the internal circuitries including the bottom driver
are powered from the 5V internal regulator. This regulator
uses the Vin input to regulate at 5V. When Vin is less than
5V, this internal regulator cannot maintain the
5V regulation and hence the output voltage would also
drop from regulation.
Enable
The enable (EN) input allows the user to control turning
on or off the regulator. To enable the regulator EN must
be pulled above the ‘EN Rising Threshold’ and to disable
the regulator EN must be pulled below ‘EN falling
Threshold’ (EN rising threshold – EN threshold
Hysteresis).
Few conditions on EN function:
1) EN must be pulled low for atleast 5us to disable the
regulator.
2) The voltage on EN cannot exceed 5V.
3) AP6508 can be enabled by Vin through a voltage
divider as shown in the figure 1 below.
Figure 1. EN Divider Network
VIN−RISE
=
VEN−RISE
(RTOP + RBOT || 1MΩ
RBOT || 1MΩ
Where VEN−RISE = 1.3V(TYP)
VIN−FALL
=
VEN−FALL
(RTOP + RBOT || 1MΩ
RBOT || 1MΩ
Where VEN−FALL = 0.9V(TYP)
Power Good
Power Good is an open drain and active high output. This
output can be pulled up high to the appropriate level with
an external resistor. The PGOOD is flagged low when
Vfb=0.7V and is an open drain output when Vfb=0.9V.
The PGOOD output can deliver a max of 4 mA sink
current at 0.4 V when de- asserted. The PGOOD pin is
held low during soft-start. Once output voltage reaches
90% of its final value, PGOOD goes high if there are no
faults.
AP6508
Document number: DS33437 Rev. 4 - 2
9 of 14
www.diodes.com
July 2011
© Diodes Incorporated