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DA7212 Datasheet, PDF (60/129 Pages) Dialog Semiconductor – Ultra-low power stereo codec
DA7212
Ultra-low power stereo codec
Company confidential
13.39.2 Level 2 system controller (SCL2)
Level 2 system controller (SCL2) is a higher level controller that provides one-touch activation of
standard operating modes. Input or output sub-systems can be activated either singly or in
combination. All selected sub-systems will start up in the correct order and without pops or clicks
when SCL2 is activated.
First, the desired input sub-systems must be selected by asserting the relevant fields (bits 1 to 7) of
the SYSTEM_MODES_INPUT (0x50) register. Similarly, the desired output sub-systems must be
selected by asserting the relevant fields (bits 1 to 7) of the SYSTEM_MODES_OUTPUT (0x51)
register.
Once the desired sub-systems have been selected, the SCL2 controller is activated by writing ‘1’ to
the MODE_SUBMIT register field in either the SYSTEM_MODES_INPUT (0x50) or the
SYSTEM_MODES_OUTPUT (0x51) register. It does not matter which of the two MODE_SUBMIT
fields is asserted. Both work in the same way, and each will start up both the input and the output
sub-systems.
When SCL2 is activated by asserting MODE_SUBMIT, all of the register-writes that are required by
the selected sub-systems are performed automatically. Each sub-system is brought up in the correct
order to avoid pops and clicks, and within each sub-system, the component parts are brought up in
the correct pop-free and click-free sequence.
The MODE_SUBMIT field used to start SCL2 is self-clearing, and is automatically reset to ‘0’ once
SCL2 has started.
SCL1 and SCL2 activity can be monitored using the SCL1_BUSY and SCL2_BUSY bits on the
SYSTEM_STATUS (0xE0) register.
If the DA7212 device is changed from one playback mode to another, or if it is changed from one
record mode to another, the initial mode is closed down first before the second mode is activated.
This happens automatically.
13.40 Power supply – standby mode
DA7212 has an ultra-low power standby mode that can be enabled to save power when the device is
not in use. Standby mode is controlled using the SYSTEM_ACTIVE register.
13.40.1 Entering standby mode
Standby mode is activated by writing a ‘0’ to the SYSTEM_ACTIVE register bit. This
SYSTEM_ACTIVE register cannot be read when in standby mode because the act of reading the bit
causes it to be asserted, which causes the standby mode to be exited.
When entering standby mode, it is important that all audio paths are shut down first because the shut
down is abrupt and audio artefacts such as pops and click may be heard. No audio functions are
possible during standby mode, as the reference oscillator and the reference voltages are both shut
down.
13.40.2 Exiting standby mode
Standby mode can be exited by writing a ‘1’ to the SYSTEM_ACTIVE register bit.
Any read or write access to the DA7212 will also cause the SYSTEM_ACTIVE bit to be asserted, but
note that the first read or write access may fail because of the time taken to restart the reference
oscillator. It is recommended that standby mode is exited by writing to the SYSTEM_ACTIVE register
rather than relying on the automatic assertion of the register by a read or write access.
Read or write accesses to I2C slave addresses other than those used by the DA7212 will not cause
standby mode to be exited.
Datasheet
Revision 3c
60 of 129
24-Nov-2015
© 2015 Dialog Semiconductor