DA9061 Datasheet, PDF (51/82 Pages) Dialog Semiconductor – Entry level PMIC for applications requiring up to 6 A

DA9061
Entry level PMIC for applications requiring up to 6 A
8.2 PCB layout
1608
1005
1005
1005
Quiet ground
1005
VLDO1
VLDO2
VDD
LDO2
IREF
VREF
VSS
ANA
VLDO3
VDD
LDO34
1005
GND
LX1
GPIO4
GPIO3
GPIO2
VBUCK1
VBUCK3
VBUCK4
VDDIO
GPIO1
GPIO0
VBUCK2
2016
VBUCK3
1608
Figure 19: PCB layout for DA9061
8.2.1 General recommendations
Appropriate trace width and quantity of vias should be used for all power supply paths.
Too high trace resistances can prevent the system from achieving the best performance, for
example, the efficiency and the current ratings of switching converters might be degraded.
Furthermore, the PCB may be exposed to thermal hot spots, which can lead to critical overheating
due to the positive temperature coefficient of copper.
Special care must be taken with the DA9061 pad connections. The traces connecting the pads
should of the same width as the pads and they should become wider as soon as possible.
It is recommended to create a separate quiet ground to which the VREF capacitor, IREF resistor, and
the crystal capacitors are connected. The PCB layout should ensure these component grounds are
kept quiet, that is, they should be separated from the main ground return path for the noisy power
Datasheet
CFR0011-120-00 Rev 5
Revision 3.2
51 of 82
01-Mar-2016
© 2016 Dialog Semiconductor