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DA14583 Datasheet, PDF (1/148 Pages) Dialog Semiconductor – Low Power Bluetooth Smart SoC with Flash memory | |||
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DATASHEET - TARGET
MARCH 06, 2015 V1.1
DA14583
Low Power Bluetooth Smart SoC with Flash memory
General description
The DA14583 integrated circuit has a fully integrated
radio transceiver and baseband processor for Blue-
tooth® Smart. It can be used as a standalone applica-
tion processor or as a data pump in hosted systems.
ï® Memories
ï® 1 Mbit Flash memory
ï® 32 kB One-Time-Programmable (OTP) memory
ï® 42 kB System SRAM
ï® 84 kB ROM
ï® 8 kB Retention SRAM
The DA14583 supports a flexible memory architecture, ï® Power management
including 1 Mbit of Flash memory, for storing Bluetooth
ï® Integrated Buck mode DC-DC converter
profiles and custom application code, which can be
ï® Embedded charge pump for Flash programming
updated over the air (OTA). The qualified Bluetooth
ï® P0, P1, and P2 ports with 3.3 V tolerance
Smart protocol stack is stored in a dedicated ROM. All
software runs on the ARM® Cortex®-M0 processor via
ï® Supports coin (typ. 3.0 V) battery cells
ï® 10-bit ADC for battery voltage measurement
a simple scheduler.
ï® Digital controlled oscillators
The Bluetooth Smart firmware includes the L2CAP ser-
vice layer protocols, Security Manager (SM), Attribute
Protocol (ATT), the Generic Attribute Profile (GATT)
and the Generic Access Profile (GAP). All profiles pub-
lished by the Bluetooth SIG as well as custom profiles
are supported.
ï® 16 MHz crystal (±20 ppm max) and RC oscillator
ï® 32 kHz crystal (±50 ppm, ±500 ppm max) and
RCX oscillator
ï® General purpose, Capture and Sleep timers
ï® Digital interfaces
ï® 24 general purpose I/Os
ï® 2 UARTs with hardware flow control up to 1 MBd
The transceiver interfaces directly to the antenna and
ï® SPI+⢠interface
is fully compliant with the Bluetooth 4.1 standard.
ï® I2C bus at 100 kHz, 400 kHz
The DA14583 has dedicated hardware for the Link
Layer implementation of Bluetooth Smart and interface
controllers for enhanced connectivity capabilities.
ï® 3-axes capable Quadrature Decoder
ï® Analog interfaces
ï® 4-channel 10-bit ADC
ï® Radio transceiver
Features
ï® Fully integrated 2.4 GHz CMOS transceiver
ï® Single wire antenna: no RF matching or RX/TX
ï® Complies with Bluetooth V4.1, ETSI EN 300 328 and
switching required
EN 300 440 Class 2 (Europe), FCC CFR47 Part 15
ï® Supply current at VBAT3V:
(US) and ARIB STD-T66 (Japan)
TX: 3.4 mA, RX: 3.7 mA (with ideal DC-DC)
ï® Processing power
ï® 0 dBm transmit output power
ï® 16 MHz 32 bit ARM Cortex-M0 with SWD inter-
ï® -20 dBm output power in âNear Field Modeâ
face
ï® -93 dBm receiver sensitivity
ï® Dedicated Link Layer Processor
ï® Packages:
ï® AES-128 bit encryption Processor
ï® QFN 40 pins, 5 mm x 5 mm
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System diagram
© 2014 Dialog Semiconductor
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www.dialog-semiconductor.com
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