DA14580_16 Datasheet, PDF (1/155 Pages) Dialog Semiconductor – Bluetooth Low Energy 4.2 SoC

DA14580
Bluetooth Low Energy 4.2 SoC
FINAL
General Description
 42 kB System SRAM
The DA14580 integrated circuit has a fully integrated
radio transceiver and baseband processor for Blue-
tooth^® low energy. It can be used as a standalone
application processor or as a data pump in hosted sys-
tems.
 84 kB ROM
 8 kB Retention SRAM
 Power management
 Integrated Buck/Boost DC-DC converter
 P0, P1, P2 and P3 ports with 3.3 V tolerance
 Easy decoupling of only 4 supply pins
The DA14580 supports a flexible memory architecture
 Supports coin (typ. 3.0 V) and alkaline (typ. 1.5 V)
for storing Bluetooth profiles and custom application
battery cells
code, which can be updated over the air (OTA). The
 10-bit ADC for battery voltage measurement
qualified Bluetooth low energy protocol stack is stored
in a dedicated ROM. All software runs on the ARM^®
Cortex^®-M0 processor via a simple scheduler.
 Digital controlled oscillators
 16 MHz crystal (±20 ppm max) and RC oscillator
 32 kHz crystal (±50 ppm, ±500 ppm max) and
The Bluetooth low energy firmware includes the
L2CAP service layer protocols, Security Manager
(SM), Attribute Protocol (ATT), the Generic Attribute
Profile (GATT) and the Generic Access Profile (GAP).
All profiles published by the Bluetooth SIG as well as
custom profiles are supported.
RCX oscillator
 General purpose, Capture and Sleep timers
 Digital interfaces
 General purpose I/Os: 14 (WLCSP34 package),
24 (QFN40 package), 32 (QFN48 package)
 2 UARTs with hardware flow control up to 1 MBd
 SPI+™ interface
The transceiver interfaces directly to the antenna and
 I2C bus at 100 kHz, 400 kHz
is fully compliant with the Bluetooth 4.2 standard.
 3-axes capable Quadrature Decoder
The DA14580 has dedicated hardware for the Link
Layer implementation of Bluetooth low energy and
interface controllers for enhanced connectivity capabili-
ties.
 Analog interfaces
 4-channel 10-bit ADC
 Radio transceiver
 Fully integrated 2.4 GHz CMOS transceiver
 Single wire antenna: no RF matching or RX/TX
Features
switching required
 Supply current at VBAT3V:
 Complies with Bluetooth V4.2, ETSI EN 300 328 and
TX: 3.4 mA, RX: 3.7 mA (with ideal DC-DC)
EN 300 440 Class 2 (Europe), FCC CFR47 Part 15
 0 dBm transmit output power
(US) and ARIB STD-T66 (Japan)
 -20 dBm output power in “Near Field Mode”
 Processing power
 -93 dBm receiver sensitivity
 16 MHz 32 bit ARM Cortex-M0 with SWD inter-
 Packages:
face
 WLCSP 34 pins, 2.436 mm x 2.436 mm
 Dedicated Link Layer Processor
 QFN 40 pins, 5 mm x 5 mm
 AES-128 bit encryption Processor
 QFN 48 pins, 6 mm x 6 mm
 Memories
 KGD (wafer, dice)
 32 kB One-Time-Programmable (OTP) memory
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System Diagram
Datasheet
CFR0011-120-01
Revision 3.4
1 of 155
09-Nov-2016
© 2014 Dialog Semiconductor