DFPSQRT Datasheet, PDF (2/3 Pages) Digital Core Design – Floating Point Pipelined Square Root Unit

tation. It also permits FPGA prototyping be-
fore ASIC production.
Unlimited Designs license allows using IP
Core in unlimited number of FPGA bitstreams
and ASIC implementations.
In all cases number of IP Core instantiations
within a design, and number of manufactured
chips are unlimited. There is no time of use
limitations.
● Single Design license for
○ VHDL, Verilog source code called HDL
Source
○ Encrypted, or plain text EDIF called Netlist
● Unlimited Designs license for
○ HDL Source
○ Netlist
● Upgrade from
○ Netlist to HDL Source
○ Single Design to Unlimited Designs
SYMBOL
datai(31:0)
en
rst
clk
datao(31:0)
ofo
ufo
ifo
PINS DESCRIPTION
PIN
clk
rst
en
datai[31:0]
datao[31:0]
ofo
ufo
ifo
TYPE
DESCRIPTION
Input Global system clock
Input Global system reset
Input Enable computing
Input Data bus input
Output Data bus output
Output Overflow flag
Output Underflow flag
Output Invalid result flag
BLOCK DIAGRAM
datai(31:0)
en
rst
clk
Argument
Checker
Main FP
Pipelined Unit
Result
Composer
datao(31:0)
ofo
ufo
ifo
Arguments Checker - performs input data
analyze against IEEE-754 number standard
compliance. The appropriate numbers and
information about the input data classes are
given as the results to Main FP Pipelined
Unit.
Main FP Pipelined Unit - performs floating
point square root function. Gives the complex
information about the results to Result Com-
poser module.
Result Composer - performs result rounding
function, data alignment to IEEE-754 stan-
dard, and the final flags setting.
PERFORMANCE
The following table gives a survey about the
Core area and performance in the ALTERA®
devices after Place & Route :
Device
Speed
grade
Logic Cells
F_max
FLEX10KE
-1
1000
48 MHz
ACEX1K
-1
1000
48 MHz
APEX20K
-1
970
50 MHz
APEX20KE
-1
970
53 MHz
APEX20KC
-7
970
62 MHz
APEX-II
-7
970
83 MHz
MERCURY
-5
975
99 MHz
STRATIX
-5
725
96 MHz
CYCLONE
-6
725
94 MHz
STRATIX-II
-3
890
131 MHz
CYCLONE-II
-6
730
99 MHz
Core performance in ALTERA® devices
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