DFPDIV Datasheet, PDF (2/3 Pages) Digital Core Design – Floating Point Pipelined Divider Unit

tation. It also permits FPGA prototyping be-
fore ASIC production.
Unlimited Designs license allows using IP
Core in unlimited number of FPGA bitstreams
and ASIC implementations.
In all cases number of IP Core instantiations
within a design, and number of manufactured
chips are unlimited. There is no time of use
limitations.
● Single Design license for
○ VHDL, Verilog source code called HDL
Source
○ Encrypted, or plain text EDIF called Netlist
● Unlimited Designs license for
○ HDL Source
○ Netlist
● Upgrade from
○ Netlist to HDL Source
○ Single Design to Unlimited Designs
SYMBOL
adatai(31:0) datao(31:0)
bdatai(31:0)
ofo
ufo
en
ifo
rst
clk
PINS DESCRIPTION
PIN
clk
rst
en
adatai[31:0]
bdatai[31:0]
datao[31:0]
ofo
ufo
ifo
TYPE
DESCRIPTION
Input Global system clock
Input Global system reset
Input Enable computing
Input A data bus input
Input B data bus input
Output Data bus output
Output Overflow flag
Output Underflow flag
Output Invalid result flag
BLOCK DIAGRAM
adatai(31:0)
bdatai(31:0)
en
rst
clk
Arguments
Checker
Main FP
Pipelined Unit
Result
Composer
datao(31:0)
ofo
ufo
ifo
Arguments Checker - performs input data
analyze against IEEE-754 number standard
compliance. The appropriate numbers and
information about the input data classes are
given as the results to Main FP Pipelined
Unit.
Main FP Pipelined Unit - performs floating
point divide function. Gives the complex in-
formation about the results and makes final
flags settings.
Result Composer - performs result rounding
function, data alignment to IEEE-754 stan-
dard, and the final flags setting.
PERFORMANCE
The following table gives a survey about the
Core area and performance in the ALTERA®
devices after Place & Route :
Device
Speed Logic
grade Cells
F_max
FLEX10KE
-1
3100
30 MHz
ACEX1K
-1
3100
30 MHz
APEX20K
-1
2720
40 MHz
APEX20KE
-1
2720
40 MHz
APEX20KC
-7
2720
42 MHz
APEX-II
-7
2720
50 MHz
MERCURY
-5
2780
65 MHz
STRATIX
-5
2270
88 MHz
CYCLONE
-6
2270
86 MHz
STRATIX-II
-3
2040
104 MHz
Core performance in ALTERA® devices
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