DP80390XP Datasheet, PDF (1/13 Pages) Digital Core Design – Pipelined High Performance 8-bit Microcontroller

DP80390XP
Pipelined High Performance
8-bit Microcontroller
ver 4.05
OVERVIEW
DP80390XP is an ultra high perform-
ance, speed optimized soft core of a single-
chip 8-bit embedded controller dedicated for
operation with fast (typically on-chip) and slow
(off-chip) memories. It supports up to 8 MB of
linear code and 16 MB of linear data spaces.
The core has been designed with a special
concern about performance to power con-
sumption ratio. This ratio is extended by an
advanced power management unit PMU.
DP80390XP soft core is 100% binary-
compatible with the industry standard 80390 &
8051 8-bit microcontroller. There are two con-
figurations of DP80390XP: Harward where
internal data and program buses are sepa-
rated, and von Neumann with common pro-
gram and external data bus. DP80390XP has
Pipelined RISC architecture 10 times faster
compared to standard architecture and exe-
cutes 85-200 million instructions per second.
This performance can also be exploited to
great advantage in low power applications
where the core can be clocked over ten times
more slowly than the original implementation
for no performance penalty.
DP80390XP is fully customizable, which
means it is delivered in the exact configuration
to meet users’ requirements. There is no need
to pay extra for not used features and wasted
silicon. It includes fully automated testbench
with complete set of tests allowing easy
package validation at each stage of SoC de-
sign flow.
CPU FEATURES
● 100% software compatible with industry
standard 80390 & 8051
○ LARGE mode – 8051 instruction set
○ FLAT mode – 80390 instruction set
● Pipelined RISC architecture enables to
execute instructions 10 times faster com-
pared to standard 8051
● 24 times faster multiplication
● 12 times faster addition
● 2 Data Pointers (DPTR) for faster memory
blocks copying
○ Advanced INC & DEC modes
○ Auto-switch of current DPTR
● Up to 256 bytes of internal (on-chip) Data
Memory
● Up to 8M bytes of linear Program Memory
○ 64 kB of internal (on-chip) Program Memory
○ 8 MB external (off-chip) Program Memory
● Up to 16M bytes of external (off-chip) Data
Memory
○ Synchronous eXternal Data Memory (SXDM)
Interface
● User programmable Program Memory Wait
States solution for wide range of memories
speed
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