DM9302 Datasheet, PDF (47/64 Pages) Davicom Semiconductor, Inc. – 10/100Mbps Ethernet Fiber/Twisted Pair Media Converter with Local bus

DM9302
10/100Mbps Ethernet Fiber/Twisted Pair Media Converter with Local bus
8.13 DAVICOM Specified Receive Error Counter Register (RECR) – 16H
Bit
15-0
Bit Name
Rcv_ Err_ Cnt
Default
0, RO
Description
Receive Error Counter
Receive error counter that increments upon detection of RXER.
Clean by reading this register.
8.14 DAVICOM Specified Disconnect Counter Register (DISCR) – 17H
Bit
15-8
7-0
Bit Name
Reserved
Disconnect
Counter
Default
0, RO
0, RO
Reserved
Description
Disconnect Counter that increment upon detection of
disconnection. Clean by reading this register.
8.15 Power Saving Control Register (PSCR) – 1DH
Bit
15-12
11
Bit Name
RESERVED
PREAMBLEX
10
AMPLITUDE
9
TX_PWR
8-0
RESERVED
Default
0,RO
0,RW
0,RW
0.RW
0,RO
Description
RESERVED
Preamble Saving Control
when both bit 10 and 11 of register 14H are set, the 10BASE-T
transmit preamble count is reduced.
1: 12-bit preamble is reduced.
0: 22-bit preamble is reduced.
Transmit Amplitude Control Disabled
1: when cable is unconnected with link partner, the TX amplitude is
reduced for power saving.
0: disable Transmit amplitude reduce function
Transmit Power Saving Control Disabled
1: when cable is unconnected with link partner, the driving current
of transmit is reduced for power saving.
0: disable transmit driving power saving function
RESERVED
Preliminary datasheet
47
DM9302-15-DS-P01
July 30, 2009