PDU1064H Datasheet, PDF (5/5 Pages) Data Delay Devices, Inc. – 6-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU1064H)

DELAY LINE AUTOMATED TESTING
PDU1064H
TEST CONDITIONS
INPUT:
Ambient Temperature: 25^oC ± 3^oC
Supply Voltage (Vcc): -5.0V ± 0.1V
Input Pulse:
Standard 10KH ECL
levels
Source Impedance: 50Ω Max.
Rise/Fall Time:
2.0 ns Max. (measured
between 20% and 80%)
Pulse Width:
Period:
PW_IN = 1.5 x Total Delay
PER_IN = 10 x Total Delay
OUTPUT:
Load:
C_load:
Threshold:
50Ω to -2V
5pf ± 10%
(V_OH + V_OL) / 2
(Rising & Falling)
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
PULSE
GENERATOR
OUT
TRIG
IN DEVICE UNDER OUT
TEST (DUT)
REF
IN
TRIG
OSCILLOSCOPE
ADDRESS SELECT
Test Setup
T_RISE
PW_IN
PER_IN
T_FALL
INPUT
80%
V_IH
80%
SIGNAL
50%
20%
50%
20%
V_IL
T_RISE
T_FALL
OUTPUT
SIGNAL
V_OH
50%
50%
V_OL
Timing Diagram For Testing
Doc #97046
DATA DELAY DEVICES, INC.
5
12/17/97
3 Mt. Prospect Ave. Clifton, NJ 07013