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3D7438 Datasheet, PDF (5/6 Pages) Data Delay Devices, Inc. – MONOLITHIC 8-BIT PROGRAMMABLE DELAY LINE (SERIES 3D7438)
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DEVICE SPECIFICATIONS
3D7438
TABLE 3: ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL MIN
MAX UNITS NOTES
DC Supply Voltage
Input Pin Voltage
Input Pin Current
Storage Temperature
Lead Temperature
VDD
VIN
IIN
TSTRG
TLEAD
-0.3
7.0
V
-0.3
VDD+0.3
V
-10
10
mA
25C
-55
150
C
300
C
10 sec
TABLE 4: DC ELECTRICAL CHARACTERISTICS
(-40C to 85C, 4.75V to 5.25V)
PARAMETER
SYMBOL MIN
Static Supply Current*
IDD
High Level Input Voltage
VIH
2.0
Low Level Input Voltage
VIL
High Level Input Current
IIH
Low Level Input Current
IIL
High Level Output
IOH
Current
Low Level Output Current
IOL
4.0
Output Rise & Fall Time
TR & TF
*IDD(Dynamic) = CLD * VDD * F
where: CLD = Average capacitance load/line (pf)
F = Input frequency (GHz)
TYP
3.0
-35.0
15.0
2.0
MAX
5.0
0.8
1.0
1.0
-4.0
2.5
UNITS
mA
V
V
A
A
mA
mA
ns
NOTES
Addr = 128
VIH = VDD
VIL = 0V
VDD = 4.75V
VOH = 2.4V
VDD = 4.75V
VOL = 0.4V
CLD = 5 pf
Input Capacitance = 10 pf typical
Output Load Capacitance (CLD) = 25 pf max
TABLE 5: AC ELECTRICAL CHARACTERISTICS
(-40C to 85C, 4.75V to 5.25V)
PARAMETER
SYMBOL MIN TYP MAX
Clock Frequency
fC
80
Enable Width
tEW
10
Clock Width
tCW
10
Data Setup to Clock
tDSC
10
Data Hold from Clock
tDHC
3
Data Setup to Enable
tDSE
10
Data Hold from Enable
tDHE
3
Enable to Serial Output Valid
tEQV
20
Enable to Serial Output High-Z
tEQZ
20
Clock to Serial Output Valid
tCQV
20
Clock to Serial Output Invalid
Enable Setup to Clock
Enable Hold from Clock
Parallel Input Valid to Delay Valid
tCQX
10
tES
10
tEH
10
tPDV
20 40
Parallel Input Change to Delay Invalid
tPDX
0
Enable to Delay Valid
tEDV
35 45
Enable to Delay Invalid
tEDX
0
Input Pulse Width
Input Period
tWI
40
Period 80
Input to Output Delay
tPLH, tPHL
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
% of Delay
% of Delay
ns
NOTES
See Table 1
See Table 1
See Table 2
Doc #10004
DATA DELAY DEVICES, INC.
5
7/8/2010
3 Mt. Prospect Ave. Clifton, NJ 07013
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