3D7521 Datasheet, PDF (2/4 Pages) Data Delay Devices, Inc. – MONOLITHIC MANCHESTER ENCODER

3D7521
APPLICATION NOTES
The 3D7521 Manchester Encoder samples the
data input at the rising edge of the input clock.
The sampled data is used in conjunction with the
clock rising and falling edges to generate the by-
phase level Manchester code.
INPUT SIGNAL CHARACTERISTICS
The 3D7521 Manchester Encoder inputs are
TTL compatible. The user should assure
himself that the 1.5 volt TTL threshold is used
when referring to all timing, especially to the input
clock duty cycle.
CLOCK DUTY CYCLE ERRORS
The 3D7521 Manchester Encoder employs the
timing of the clock rising and falling edges (duty
cycle) to implement the required coding scheme.
To reduce the difference between the output data
high time and low time, it is essential that the
deviation of the input clock duty cycle from 50/50
be minimized.
OUTPUT SIGNAL CHARACTERISTICS
The 3D7521 presents at its outputs the true and
the complimented encoded data.
The High-to-Low time skew of the selected data
output should be budgeted by the user, as it
relates to his application, to satisfactorily
estimate the distortion of the transmitted data
stream.
Such an estimate is very useful in determining
the
functionality and margins of the data link, if a
3D7522 Manchester Decoder is used to decode
the received data.
POWER SUPPLY AND
TEMPERATURE CONSIDERATIONS
CMOS integrated circuitry is strongly dependent
on power supply and temperature. The
monolithic 3D7521 Manchester encoder utilizes
novel and innovative compensation circuitry to
minimize timing variations induced by fluctuations
in power supply and/or temperature.
RESET
(RESB)
CLOCK
(CIN)
t_DS
DATA
(DIN)
TRANSMIT
(TXB)
TRANSMIT
(TX)
1/f_C
1
0
t_DH
Power-on reset (Left high for normal operation)
1
1
0
0
1
0
T_2H
T_2L
T_1H
T_1L
1
0
1
1
0
0
1
0
Figure 1: Timing Diagram
Doc #06001
DATA DELAY DEVICES, INC.
2
10/31/2007
Tel: [phone] Fax: [phone] http://www.datadelay.com