3D7521 Datasheet, PDF (1/4 Pages) Data Delay Devices, Inc. – MONOLITHIC MANCHESTER ENCODER

MONOLITHIC MANCHESTER
ENCODER
(SERIES 3D7521)
3D7521
ddaeltaay ₃ ^
devices, inc.
FEATURES
• All-silicon, low-power CMOS
technology
• TTL/CMOS compatible inputs and
outputs
• Vapor phase, IR and wave
solderable
• Low ground bounce noise
• Maximum data rate: 50 MBaud
PACKAGES
CLK 1
RESB 2
DAT 3
GND 4
8 VDD
7 N/C
6 TXB
5 TX
3D7521Z SOIC (.150)
CLK 1 14 VDD
N/C 2 13 N/C
N/C 3 12 N/C
RESB 4 11 N/C
DAT 5 10 N/C
N/C 6 9 TXB
GND 7 8 TX
3D7521D SOIC (.150)
For mechanical dimensions, click here.
For package marking details, click here.
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The 3D7521 is a monolithic CMOS Manchester Encoder. The clock
and data, present at the unit input, are combined into a single bi-phase-
level signal. In this encoding mode, a logic one is represented by a
high-to-low transition within the bit cell, while a logic zero is represented
by a low-to-high transition. The unit operating baud rate (in Mbaud) is
equal to the input clock frequency (in MHZ). All pins marked N/C must
be left unconnected.
DAT
CLK
RESB
TX
TXB
VDD
GND
Data Input
Clock Input
Reset
Signal Output
Inverted Signal Output
+5 Volts
Ground
The all-CMOS 3D7521 integrated circuit has been designed as a reliable, economic alternative to hybrid
TTL Manchester Encoder. It is TTL- and CMOS-compatible, capable of driving ten 74LS-type loads. It is
offered in space saving surface mount 8-pin and 14-pin SOICs.
Doc #06001
DATA DELAY DEVICES, INC.
1
10/31/2007
3 Mt. Prospect Ave. Clifton, NJ 07013