DS1221 Datasheet, PDF (6/8 Pages) Dallas Semiconductor – Nonvolatile Controller x 4 Chip

DS1221
SECURITY OPTION
When activated by Dallas Semiconductor, the security option prevents unauthorized access. A sequence
of events must occur to gain access to the memories (Figure 3). First, a dummy read cycle or a 200 ns
active low reset pulse is executed to initialize the sequence. Second, a 64-bit access code must be
consecutively written to the DS1221 using the write enable signal ( WE ), the chip enable signal ( CE ), and
the data input/output signal (DQ). The code is written to the DS1221 without regard to the address.
Actual RAM locations are not written, as the security option is intercepting the data path until access is
granted. Instead, a special 64-bit write only register is written. Following the 64 write cycles, the register
is compared to a 64-bit pattern uniquely defined by the user and programmed into the DS1221 by Dallas
Semiconductor at the time of manufacture. This pattern can only be interrogated by an intelligent
controller within the DS1221 and cannot be read by the user. If a read cycle occurs before 64 write cycles
are completed, the security sequence is aborted. When a correct match for 64 bits is received, the third
part of the security sequence begins by reading a 64-bit read only register. This register consists of 64 bits
also defined by the user and programmed into the DS1221 by Dallas Semiconductor at the time of
manufacture. For each of the 64 read cycles, 1 bit of the user-defined read only register is driven onto the
DQ line. This phase also requires that the 64 read cycles be consecutive. The data being read from the
read only register can be used by software to determine if the DS1221 will be permitted to be used with
that particular system. After the 64^th read cycle has been executed the DS1221 is unlocked and all
subsequent memory cycles will be passed through and will become actual memory accesses based upon
address inputs. If V_CC falls below 4.5 volts or the reset line is driven low, the entire security sequence
must be executed again in order to access memory locations.
NOTE:
Contact Dallas Semiconductor sales office for code assignments.
SECURITY OPTION
AC ELECTRICAL CHARACTERISTICS
PARAMETER
SYMBOL MIN
Read Cycle Time
CE Access Time
t_RC
250
t_CO
RD Access Time
t_OE
CE to Output Low Z
t_COE
10
RD to Output Low Z
t_OEE
10
CE to Output High Z
t_OD
RD to Output High Z
t_ODO
Read Recovery
Write Cycle
Write Pulse Width
Write Recovery
Data Setup
Data Hold Time
CE Pulse Width
t_RR
50
t_WC
250
t_WP
170
t_WR
50
t_DS
100
t_DH
0
t_CW
170
Reset Pulse Width
t_RST
200
(0°C to 70°C; V_CC = 5V ± 10%)
TYP
MAX UNITS NOTES
ns
200
ns
100
ns
ns
ns
100
ns
100
ns
ns
ns
ns
ns
ns
ns
ns
ns
6 of 8