DS1221 Datasheet, PDF (5/8 Pages) Dallas Semiconductor – Nonvolatile Controller x 4 Chip

CAPACITANCE
PARAMETER
Input Capacitance
Output Capacitance
SYMBOL
C_IN
C_OUT
MIN
AC ELECTRICAL CHARACTERISTICS
PARAMETER
SYMBOL MIN
CE Propagation Delay
t_PD
5
CE High to Power-Fail
t_PF
Address Setup
t_AS
20
PARAMETER
Recovery at Power-Up
V_CC Slew Rate 4.5 - 4.25V
V_CC Slew Rate 4.25 - 3V
V_CC Slew Rate 4.25 - 4.5V
CE Pulse Width
SYMBOL
t_REC
t_F
t_FB
t_R
t_CE
NOTES:
1. All voltages are referenced to ground.
2. Only one battery input is required.
MIN
2
300
10
0
TYP
MAX
5
7
DS1221
(t_A = 25°C)
UNITS NOTES
pF
pF
(0°C to 70°C; V_CC = 4.5 to 5.5V)
TYP
MAX UNITS NOTES
15
25
ns
5
0
ns
ns
9
(0°C to 70°C; V_CC < 4.5V)
TYP
MAX UNITS NOTES
5
10
ms
µs
µs
µs
1.5
µs
7, 8
3. Measured with V_CCO and CE0 - CE3 open.
4. I_CCO1 is the maximum average load which the DS1221 can supply to the memories.
5. Measured with a load as shown in Figure 4.
6. I_CCO2 is the maximum average load current which the DS1221 can supply to the memories in the
battery back-up mode.
7. Chip enable outputs CE0 - CE3 can only sustain leakage current in the battery back-up mode.
8. t_CE max. must be met to ensure data integrity on power loss.
9. t_AS is only required to keep the decoder outputs glitch-free. While CE is low, the outputs ( CE0 - CE3 )
will be defined by inputs A and B with a propagation delay of t_PD from an A or B input change.
10. For applications where higher currents are required, please see the DS1259 Battery Manager Chip
data sheet.
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