DS1007 Datasheet, PDF (6/6 Pages) Dallas Semiconductor – 7-1 Silicon Delay Line

TEST CONDITIONS
DS1007
INPUT:
Ambient Temperature:
Supply Voltage (V_CC):
Input Pulse:
Source Impedance:
Rise and Fall Time:
Pulse Width:
Period:
25°C ± 3°C
5.0V ± 0.1V
High = 3.0V ± 0.1V
Low = 0.0V ± 0.1V
50 ohm max.
3.0 ns max.
500 ns
1 µs
OUTPUT:
Each output is loaded with the equivalent of one 74F04 input gate. Delay is measured at the 1.5V level on
the rising edge.
NOTE:
Above conditions are for test only and do not restrict the operation of the device under other data sheet
conditions.
6 of 6