DS12887A Datasheet, PDF (5/19 Pages) Maxim Integrated Products – Real-Time Clock

DS5000(T)
DS5000(T) LOGICAL ADDRESS SPACES Figure 2
64K –
ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ _{32K –}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ_ÏÏÎÎ_ÏÏÎÎ_ÏÏÎÎ_ÏÏÎÎ_{ÏÏ 8K –}
64K –
32K –
8K –
NV RAM
DATA
MEMORY
ÎÎ_{ÏÏÏÏ}ÎÎ_{ÏÏÏÏ}ÎÎ_{ÏÏÏÏ}ÎÎ_{ÏÏÏÏ}ÎÎ_{ÏÏÏÏ ÎÎÎÎÏÏÎÎÎÎÏÏÎÎÎÎÏÏÎÎÎÎÏÏÎÎÎÎÏÏ 127}
ÏÏÏÏÏ ÎÎÎÎÎ ₀
ÏÏÏÏÏ ÎÎÎÎÎ _DATA
REGISTERS
255
128
SPECIAL
FUNCTION
REGISTERS
NV RAM
PROGRAM
MEMORY
0
PROGRAM
MEMORY
0
DATA
MEMORY
RANGE
ADDR.
PARTITION
ADDR.
LEGEND:
INTERNAL REGISTERS
= ON–CHIP REGISTERS
ÏÏÏÏ_{= NV RAM MEMORY}
ÎÎÎÎ _{= ACCESSED VIA EXPANDED BUS}
PROGRAM LOADING
The Program Load Modes allow initialization of the
NV RAM Program/Data Memory. This initialization may
be performed in one of two ways:
1. Serial Program Loading which is capable of per-
forming Bootstrap Loading of the DS5000(T). This
feature allows the loading of the application program
to be delayed until the DS5000(T) is installed in the
end system. Dallas Semiconductor strongly recom-
mends the use of serial program loading because of
its versatility and ease of use.
2. Parallel Program Load cycles which perform the ini-
tial loading from parallel address/data information
presented on the I/O port pins. This mode is timing–
set compatible with the 8751H microcontroller pro-
gramming mode.
The DS5000(T) is placed in its Program Load configura-
tion by simultaneously applying a logic 1 to the RST pin
and forcing the PSEN line to a logic 0 level. Immediately
following this action, the DS5000(T) will look for a paral-
lel Program Load pulse, or a serial ASCII carriage return
(0DH) character received at 9600, 2400, 1200, or 300
bps over the serial port.
The hardware configurations used to select these
modes of operation are illustrated in Figure 3.
021998 5/19