DS5002FP Datasheet, PDF (4/25 Pages) Dallas Semiconductor – Secure Microprocessor Chip

DS5002FP Secure Microprocessor Chip
AC CHARACTERISTICS—EXPANDED BUS MODE TIMING SPECIFICATIONS
(V_CC = 5V ±10%, T_A = 0°C to +70°C.) (Figure 1 and Figure 2)
#
PARAMETER
SYMBOL
CONDITIONS
1 Oscillator Frequency
2 ALE Pulse Width
3 Address Valid to ALE Low
4 Address Hold After ALE Low
14 RD Pulse Width
15 WR Pulse Width
1 / t_CLK
t_ALPW
t_AVALL
t_AVAAV
t_RDPW
t_WRPW
16 RD Low to Valid Data In
t_RDLDV
12MHz
16MHz
17 Data Hold after RD High
18 Data Float after RD High
19 ALE Low to Valid Data In
t_RDHDV
t_RDHDZ
t_ALLVD
12MHz
16MHz
20 Valid Address to Valid Data In
t_AVDV
12MHz
16MHz
21 ALE Low to RD or WR Low
22
Address Valid to RD or WR
Low
t_ALLRDL
t_AVRDL
23 Data Valid to WR Going Low
t_DVWRL
24 Data Valid to WR High
t_DVWRH
12MHz
16MHz
25 Data Valid after WR High
26 RD Low to Address Float
27 RD or WR High to ALE High
t_WRHDV
t_RDLAZ
t_RDHALH
MIN
1.0
2t_CLK - 40
t_CLK - 40
t_CLK - 35
6t_CLK - 100
6t_CLK - 100
0
3t_CLK - 50
4t_CLK - 130
t_CLK - 60
7t_CLK - 150
7t_CLK - 90
t_CLK-50
t_CLK - 40
MAX
16
5t_CLK - 165
5t_CLK - 105
2t_CLK - 70
8t_CLK - 150
8t_CLK - 90
9t_CLK - 165
9t_CLK - 105
3t_CLK + 50
0
t_CLK + 50
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Figure 1. Expanded Data Memory Read Cycle
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