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DS87C530_05 Datasheet, PDF (36/47 Pages) Dallas Semiconductor – EPROM/ROM Microcontrollers with Real-Time Clock
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock
MOVX CHARACTERISTICS USING STRETCH MEMORY CYCLES
PARAMETER
Data Access ALE Pulse Width
Port 0 Address Valid to ALE Low
Address Hold After ALE Low for
MOVX Write
RD Pulse Width
WR Pulse Width
RD Low Valid Data In
Data Hold After Read
Data Float After Read
ALE Low to Valid Data In
Port 0 Address to Valid Data In
Port 2 Address to Valid Data In
ALE Low to RD or WR Low
Port 0 Address to RD or WR Low
Port 2 Address to RD or WR Low
Data Valid to WR Transition
Data Hold After Write
RD Low to Address Float
RD or WR High to ALE High
SYMBOL
tLHLL2
tAVLL2
tLLAX2
tRLRH
tWLWH
tRLDV
tRHDX
tRHDZ
tLLDV
tAVDV1
tAVDV2
tLLWL
tAVWL1
tAVWL2
tQVWX
tWHQX
tRLAZ
tWHLH
VARIABLE CLOCK
MIN
MAX
1.5tCLCL-5
2tCLCL-5
0.5tCLCL-5
tCLCL-5
0.5tCLCL-10
tCLCL-7
2tCLCL-5
tMCS-10
2tCLCL-5
tMCS-10
0
2tCLCL-22
tMCS-24
tCLCL-5
2tCLCL-5
2.5tCLCL-31
tMCS+tCLCL-26
3tCLCL-29
tMCS+2CLCL-29
3.5tCLCL-37
tMCS+2.5LCL-37
0.5tCLCL-10
0.5tCLCL+5
tCLCL-5
tCLCL-9
tCLCL+5
2tCLCL-7
1.5tCLCL-17
2.5tCLCL-16
-6
tCLCL-5
2tCLCL-6
(Note 1)
-4
10
tCLCL-5
tCLCL+5
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
STRETCH
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
—
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
Note 1:
tMCS is a time period related to the Stretch memory cycle selection. The following table shows the value of tMCS for each Stretch
selection.
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