DS5000FP Datasheet, PDF (18/22 Pages) Dallas Semiconductor – Soft Microprocessor Chip

DS5000FP
AC CHARACTERISTICS: BYTE-WIDE ADDRESS/DATA BUS TIMING
(V_CC = 5V ±5%, T_A = 0°C to +70°C.)
#
PARAMETER
SYMBOL
MIN
MAX
56 ^{Delay to Embedded Address Valid from CE1}
Low During Opcode Fetch
t_CE1LPA
20
57 CE1 or CE2 Pulse Width
t_CEPW
4t_CLK-15
58 ^{Embedded Address Hold after CE1 High During}
Opcode Fetch
t_CE1HPA
2t_CLK-20
59 ^{Embedded Data Setup to CE1 High During}
Opcode Fetch
t_OVCE1H
1t_CLK+40
60 ^{Embedded Data Hold after CE1 High During}
Opcode Fetch
t_CE1HOV
10
61 ^{Embedded Address Hold after CE1 or CE2 High}
During MOVX
t_CEHDA
4t_CLK-30
62 ^{Delay from Embedded Address Valid to CE1 or}
CE2 Low During MOVX
t_CELDA
4t_CLK-25
63 ^{Embedded Data Hold Setup to CE1 or CE2}
High During MOVX (Read)
t_DACEH
1t_CLK+40
64 ^{Embedded Data Hold after CE1 or CE2 High}
During MOVX (Read)
t_CEHDV
10
65 ^{Embedded Address Valid to R/ W Active During}
MOVX (Write)
t_AVRWL
3t_CLK-35
66 ^{Delay from R/ W Low to Valid Data Out During}
MOVX (Write)
t_RWLDV
20
67 ^{Valid Data Out Hold Time from CE1 or CE2}
High
t_CEHDV
1t_CLK-15
68 Valid Data Out Hold Time from R/ W High
t_RWHDV
0
69 Write Pulse Width (R/ W Low Time)
t_RWLPW
6t_CLK-20
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
18 of 22