DS5000FP Datasheet, PDF (11/22 Pages) Dallas Semiconductor – Soft Microprocessor Chip

DS5000FP
AC CHARACTERISTICS: EXPANDED BUS MODE TIMING SPECIFICATIONS
(V_CC = 5V ±5%, T_A = 0°C to +70°C.)
#
PARAMETER
SYMBOL
MIN
MAX
UNITS
1 Oscillator Frequency
2 ALE Pulse Width
3 Address Valid to ALE Low
4 Address Hold After ALE Low
at 12MHz
5 ALE Low to Valid Instruction In
at 16MHz
1/t_CLK
t_ALPW
t_AVALL
t_AVAAV
t_ALLVI
1.0
2t_CLK -40
t_CLK -40
t_CLK -35
16
4t_CLK -150
4t_CLK -90
MHz
ns
ns
ns
ns
6 ALE Low to PSEN Low
t_ALLPSL
t_CLK -25
ns
7 PSEN Pulse Width
t_PSPW
3t_CLK -35
ns
at 12MHz
8 PSEN Low to Valid Instruction In
at 16MHz
t_PSLVI
3t_CLK -150
ns
3t_CLK -90
9 Input Instruction Hold after PSEN Going High
t_PSIV
0
ns
10 Input Instruction Float after PSEN Going High
t_PSIX
t_CLK -20
ns
11 Address Hold after PSEN Going High
t_PSAV
t_CLK -8
ns
12
Address Valid to Valid
Instruction In
at 12MHz
at 16MHz
t_AVVI
5t_CLK -150
ns
5t_CLK -90
13 PSEN Low to Address Float
t_PSLAZ
0
ns
14 RD Pulse Width
t_RDPW
6t_CLK -100
ns
15 WR Pulse Width
t_WRPW
6t_CLK -100
ns
16 RD Low to Valid Data In
at 12MHz
at 16MHz
t_RDLDV
5t_CLK -165
ns
5t_CLK -105
17 Data Hold after RD High
t_RDHDV
0
ns
18 Data Float after RD High
t_RDHDZ
2t_CLK -70
ns
19 ALE Low to Valid Data In
20 Valid Address to Valid Data In
at 12MHz
at 16MHz
at 12MHz
at 16MHz
t_ALLVD
t_AVDV
8_CLK -150
ns
8t_CLK -90
9t_CLK -165
ns
9t_CLK -105
21 ALE Low to RD or WR Low
t_ALLRDL
3t_CLK -50
3t_CLK +50
ns
22 Address Valid to RD or WR Low
t_AVRDL
4t_CLK -130
ns
23 Data Valid to WR Going Low
t_DVWRL
t_CLK -60
ns
24 Data Valid to WR High
at 12MHz
t_DVWRH
7t_CLK -150
ns
at 16MHz
7t_CLK -90
25 Data Valid after WR High
t_WRHDV
t_CLK -50
ns
26 RD Low to Address Float
t_RDLAZ
0
ns
27 RD or WR High to ALE High
t_RDHALH
t_CLK -40
t_CLK +50
ns
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