DS21Q41B Datasheet, PDF (16/61 Pages) Dallas Semiconductor – Quad T1 Framer

TCR1: TRANSMIT CONTROL REGISTER 1 (Address=35 Hex)
(MSB)
LOTCMC TFPT
TCPT
RBSE
GB7S TLINK
TBL
DS21Q41B
(LSB)
TYEL
SYMBOL POSITION NAME AND DESCRIPTION
LOTCMC
TCR1.7
Loss Of Transmit Clock Mux Control. Determines whether
the transmit side formatter should switch to the ever present
RCLK if the TCLK input should fail to transition (see Figure 1-1
for details).
0=do not switch to RCLK if TCLK stops
1=switch to RCLK if TCLK stops
TFPT
TCR1.6
Transmit Framing Pass Through. (see note below)
0=Ft or FPS bits sourced internally
1=Ft or FPS bits sampled at TSER during F-bit time
TCPT
TCR1.5
Transmit CRC Pass Through. (see note below)
0=source CRC6 bits internally
1=CRC6 bits sampled at TSER during F-bit time
RBSE
TCR1.4
Robbed Bit Signaling Enable. (see note below)
0=no signaling is inserted in any channel
1=signaling is inserted in all channels (the TTR registers can be
used to block insertion on a channel by channel basis)
GB7S
TCR1.3
Global Bit 7 Stuffing. (see note below)
0=allow the TTR registers to determine which channels
containing all 0s are to be Bit 7 stuffed
1=force Bit 7 stuffing in all 0-byte channels regardless of how
the TTR registers are programmed
TLINK
TCR1.2
TLINK Select. (see note below)
0=source FDL or Fs bits from TFDL register
1=source FDL or Fs bits from the TLINK pin
TBL
TCR1.1 Transmit Blue Alarm. (see note below)
0=transmit data normally
1=transmit an unframed all ones code at TPOS and TNEG
TYEL
TCR1.0
Transmit Yellow Alarm. (see note below)
0=do not transmit yellow alarm
1=transmit yellow alarm
Note: for a detailed description of how the bits in TCR1 affect the transmit side formatter of the
DS21Q41, please see Figure 12-9.
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