DS3101 Datasheet, PDF (132/149 Pages) Dallas Semiconductor – Stratum 3/3E Timing Card IC

DS3101 Stratum 3/3E Timing Card IC
Table 10-5. LVPECL Pins
(V_DD = 1.8V ±10%, V_DDIO = 3.3V ±5%, T_A = -40°C to +85°C) (See Figure 10-2.)
PARAMETER
SYMBOL CONDITIONS
MIN
Input High Voltage, Differential Inputs
Input Low Voltage, Differential Inputs
V_IHPECL
V_ILPECL
(Note 1)
(Note 1)
V_DDIO -
2.4
V_DDIO -
2.5
Input Differential Voltage
Input High Voltage, Single-Ended
Inputs
Input Low Voltage, Single-Ended
Inputs
V_IDPECL
V_IHPECL,S
V_ILPECL,S
(Note 2)
(Note 2)
0.1
V_DDIO -
1.3
V_DDIO -
2.4
TYP
MAX
V_DDIO -
0.4
V_DDIO -
0.5
1.4
V_DDIO -
0.5
V_DDIO -
1.5
UNITS
V
V
V
V
V
Note 1:
Note 2:
Note 3:
For a differential input voltage ≥ 100mV.
With the unused differential input tied to V_DDIO - 1.4V.
Although the DS3101’s differential outputs do not directly drive standard LVPECL signals, these output pins can easily be
interfaced to LVPECL and CML inputs on neighboring ICs using a few external passive components. Refer to Maxim App Note
HFAN-1.0 for details.
Figure 10-2. Recommended Termination for LVPECL Pins
VDD_ICDIFF
130Ω
130Ω
input signal POS
input signal NEG
50 Ω
50 Ω
input POS
input NEG
82Ω
82Ω
VSS_ICDIFF
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