CY8C25122 Datasheet, PDF (93/148 Pages) Cypress Semiconductor – 8-Bit Programmable System-on-Chip (PSoC™) Microcontrollers

Analog PSoC Blocks
φ₁*AutoZero
A Mux
A Inputs
REFHI
REFLO
AGND
ARefMux
ASign
B Inputs
BMuxSCB
FCap
16,32 C
(φ₂+!AutoZero)
* FSW1
CCap
0..31 C
BQTAP
ACap
0..31 C
φ₁
φ₂+AutoZero
φ₁ *
φ₂
!AutoZero
φ₁* FSW0
OUT
BCap
0..31 C
φ₂ +!BSW
φ₂+!BSW
Power
φ₁*BSW
φ₁*BSW
AnalogBus*φ₂B
ABUS
CompBus
CBUS
Figure 25: Analog Switch Cap Type B PSoC Blocks
10.10.2 Registers
10.10.2.1 Analog Switch Cap Type B Block xx Control 0 Register
FCap controls the size of the switched feedback capaci-
tor in the integrator.
ClockPhase controls the internal clock phasing relative
to the input clock phasing. ClockPhase affects the output
of the analog column bus which is controlled by the
AnalogBus bit in Control 2 Register (ASB11CR2,
ASB13CR2, ASB20CR2, ASB22CR2).
ASign controls the switch phasing of the switches on the
bottom plate of the A capacitor. The bottom plate sam-
ples the input or the reference.
The ACap bits set the value of the capacitor in the A
path.
Table 72: Analog Switch Cap Type B Block xx Control 0 Register
Bit #
POR
Read/
Write
Bit Name
7
0
RW
FCap
6
0
RW
ClockPhase
5
0
RW
ASign
4
0
RW
ACap[4]
3
0
RW
ACap[3]
2
0
RW
ACap[2]
1
0
RW
ACap[1]
0
0
RW
ACap[0]
September 5, 2002
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
93