W320-03 Datasheet, PDF (9/19 Pages) Cypress Semiconductor – 200-MHz Spread Spectrum Clock Synthesizer/Driver with Differential CPU Outputs

PRELIMINARY
W320-03
Switching Characteristics^[9] Over the Operating Range
Parameter
t₁
t₃
Output
All
USB, REF,
DOT
Description
Output Duty Cycle^[10]
Falling Edge Rate
t₃
PCI,3V66
Falling Edge Rate
t₅
3V66[0:1]
3V66-3V66 Skew
t₅
66BUFF[0:2] 66BUFF-66BUFF Skew
t₆
PCI
PCI-PCI Skew
t₇
3V66,PCI
3V66-PCI Clock Jitter
t₉
3V66
Cycle-Cycle Clock Jitter
t₉
USB, DOT
Cycle-Cycle Clock Jitter
t₉
PCI
Cycle-Cycle Clock Jitter
t₉
REF
Cycle-Cycle Clock Jitter
CPU 1.0V Switching Characteristics
t₂
CPU
RiseTime
t₃
CPU
Fall Time
t₄
t₈
V_oh
V_ol
V_crossover
CPU
CPU
CPU
CPU
CPU
CPU
CPU-CPU Skew
Cycle-Cycle Clock Jitter
Rise/Fall Matching
High-level Output Voltage
including overshoot
Low-level Output Voltage
including undershoot
Crossover Voltage
Test Conditions
Measured at 1.5V
Between 2.4V and 0.4V
Between 2.4V and 0.4V
Measured at 1.5V
Measured at 1.5V
Measured at 1.5V
3V66 leads. Measured at 1.5V
Measured at 1.5V t_{9 =} t_9A – t_9B
Measured at 1.5V t_{9 =} t_9A – t_9B
Measured at 1.5V t_{9 =} t_9A – t_9B
Measured at 1.5V t_{9 =} t_9A – t_9B
Min.
45
0.5
Max.
55
2.0
Unit
%
ps
1.0 4.0
V/ns
500 ps
175 ps
500 ps
1.5 3.5
ns
250 ps
350 ps
500 ps
1000 ps
Measured differential waveform from 175 467 ps
–0.35V to +0.35V
Measured differential waveform from 175 467 ps
–0.35V to +0.35V
Measured at Crossover
150 ps
Measured at Crossover t_{8 =} t_8A – t_8B
Measured with test loads^[13]
150 ps
325 mV
Measured with test loads^[13]
0.92 1.45 V
Measured with test loads^[13]
-0.2 0.35 V
Measured with test loads^[13]
0.51 0.76 V
CPU 0.7V Switching Characteristics
t₂
CPU
RiseTime
Measured single ended waveform
from 0.175V to 0.525V
175 700 ps
t₃
CPU
Fall Time
Measured single ended waveform
from 0.175V to 0.525V
175 700 ps
t₄
t₈
V_oh
V_ol
V_crossover
CPU
CPU
CPU
CPU
CPU
CPU
CPU-CPU Skew
Measured at Crossover
150 ps
Cycle-Cycle Clock Jitter
Measured at Crossover t_{8 =} t_8A – t_8B
With all outputs running
150 ps
Rise/Fall Matching
Measured with test loads^{[11, 12]}
20
%
High-level Output Voltage Measured with test loads^[12]
including overshoot
0.85 V
Low-level Output Voltage Measured with test loads^[12]
-0.15
V
including undershoot
Crossover Voltage
Measured with test loads^[12]
0.28 0.43 V
Notes:
9. All parameters specified with loaded outputs.
10. Duty cycle is measured at 1.5V when V_DD = 3.3V. When V_DD = 2.5V, duty cycle is measured at 1.25V.
11. Determined as a fraction of 2*(Trp – Trn)/(Trp +Trn) Where Trp is a rising edge and Trp is an intersecting falling edge.
12. The 0.7V test load is R_s = 33.2Ω, R_p = 49.9Ω in test circuit.
13. The 1.0V test load is shown on test circuit page.
Document #: 38-07248 Rev. **
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