CY7C373 Datasheet, PDF (9/12 Pages) Cypress Semiconductor – UltraLogic™ 64-Macrocell Flash CPLD

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Switching Waveforms (continued)
Latched Input and Output
LATCHED INPUT
LATCHED
OUTPUT
INPUT LATCH
ENABLE
OUTPUT LATCH
ENABLE
t_ICOL
t_ICS
t_PDLL
t_SL
LATCH ENABLE
t_WH
t_WL
Asynchronous Reset
INPUT
REGISTERED
OUTPUT
CLOCK
t_RW
t_RO
t_RR
Asynchronous Preset
INPUT
REGISTERED
OUTPUT
CLOCK
t_PW
t_PO
t_PR
CY7C373i
t_HL
Document #: 38-03030 Rev. *A
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