CY14C101PA_1105 Datasheet, PDF (9/44 Pages) Cypress Semiconductor – 1-Mbit (128 K x 8) Serial (SPI) nvSRAM with Real Time Clock

CY14C101PA
CY14B101PA
CY14E101PA
SPI Functional Description
The CY14X101PA uses an 8-bit instruction register. Instructions
and their operation codes are listed in Table 1. All instructions,
addresses, and data are transferred with the MSB first and start
with a HIGH to LOW CS transition. There are, in all, 21 SPI
instructions that provide access to most of the functions in
nvSRAM. Further, the WP, HOLD, and HSB pins provide
additional functionality driven through hardware.
Table 1. Instruction Set
Instruction
Category
Instruction
Name
Status Register Control Instructions
RDSR
Status Register access
FAST_RDSR
WRSR
Write protection and block ^WREN
protection
WRDI
SRAM Read/Write Instructions
READ
Memory access
FAST_READ
WRITE
RTC Read/Write Instructions
RDRTC
RTC access
FAST_RDRTC
Special NV Instructions
nvSRAM special functions
Special Instructions
Sleep
Serial number
WRTC
STORE
RECALL
ASENB
ASDISB
SLEEP
WRSN
RDSN
FAST_RDSN
Device ID read
RDID
FAST_RDID
Reserved
- Reserved -
Opcode
0000 0101
0000 1001
0000 0001
0000 0110
0000 0100
0000 0011
0000 1011
0000 0010
0001 0011
0001 1101
0001 0010
0011 1100
0110 0000
0101 1001
0001 1001
1011 1001
1100 0010
1100 0011
1100 1001
1001 1111
1001 1001
0001 1110
Operation
Read Status Register
Fast Status Register read - SPI clock >
40 MHz
Write Status Register
Set Write Enable latch
Reset Write Enable latch
Read data from memory array
Fast read - SPI clock >40 MHz
Write data to memory array
Read RTC registers
Fast RTC register read - SPI clock >
25 MHz
Write RTC registers
Software STORE
Software RECALL
AutoStore enable
AutoStore disable
Sleep mode enable
Write serial number
Read serial number
Fast serial number read - SPI clock > 40
MHz
Read manufacturer JEDEC ID and
product ID
Fast manufacturer JEDEC ID and
product ID Read - SPI clock > 40 MHz
The SPI instructions in CY14X101PA are divided based on their
functionality in these types:
❐ Status Register control instructions:
• Status Register access: RDSR, FAST_RDSR and WRSR
instructions
• Write protection and block protection: WREN and WRDI
instructions along with WP pin and WEN, BP0, and BP1
bits
❐ SRAM Read/Write instructions
• Memory access: READ, FAST_READ, and WRITE instruc-
tions
❐ RTC Read/Write instructions
• RTC access: RDRTC, FAST_RDRTC and WRTC
instructions
❐ Special NV instructions
• nvSRAM special instructions: STORE, RECALL, ASENB,
and ASDISB
❐ Special instructions: SLEEP, WRSN, RDSN, FAST_RDSN,
RDID, FAST_RDID
Document #: 001-54392 Rev. *E
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