CY14C101PA_1105 Datasheet, PDF (17/44 Pages) Cypress Semiconductor – 1-Mbit (128 K x 8) Serial (SPI) nvSRAM with Real Time Clock

CY14C101PA
CY14B101PA
CY14E101PA
Figure 21. AutoStore Enable Operation
CS
SCK
01234567
SI
0101100 1
SO
HI-Z
AutoStore Disable (ASDISB) Instruction
AutoStore is enabled by default in CY14X101PA. The AutoStore
Disable instruction disables the AutoStore on CY14X101PA.
This setting is not nonvolatile and needs to be followed by a
STORE sequence if this is desired to survive the power cycle.
To issue this instruction, the device must be write enabled (WEN
= ‘1’). The instruction is performed by transmitting the ASDISB
opcode on the SI pin following the falling edge of CS. The WEN
bit is cleared on the positive edge of CS following the ASDISB
instruction.
.
Figure 22. AutoStore Disable Operation
CS
SCK
01 234567
SI
00011001
SO
HI-Z
Special Instructions
SLEEP Instruction
SLEEP instruction puts the nvSRAM in sleep mode. When the
SLEEP instruction is issued and CS is brought HIGH, the
nvSRAM performs a STORE operation to secure the data to
nonvolatile memory and then enters into sleep mode. The device
starts consuming I_ZZ current after t_SLEEP time from the instance
when SLEEP instruction is registered. The device is not
accessible for normal operations after SLEEP instruction is
issued. Once in sleep mode, the SCK and SI pins are ignored
and SO will be Hi-Z but device continues to monitor the CS pin.
To wake the nvSRAM from the sleep mode, the device must be
selected by toggling the CS pin from HIGH to LOW. The device
wakes up and is accessible for normal operations after t_WAKE
duration after a falling edge of CS pin is detected.
Note Whenever nvSRAM enters into sleep mode, it initiates
nonvolatile STORE cycle which results in an endurance cycle per
sleep command execution. A STORE cycle starts only if a write
to the SRAM has been performed since the last STORE or
RECALL cycle.
Figure 23. Sleep Mode Entry
CS
SCK
01234567
tSLEEP
SI
1011100 1
SO
HI-Z
Serial Number
The serial number is an 8-byte programmable memory space
provided to you to uniquely identify this device. It typically
consists of a two byte Customer ID, followed by five bytes of
unique serial number and one byte of CRC check. However,
nvSRAM does not calculate the CRC and it is up to the system
designer to utilize the eight byte memory space in whatever
manner desired. The default value for eight byte locations are set
to ‘0x00’.
WRSN (Serial Number Write) Instruction
The serial number can be written using the WRSN instruction. To
write serial number the write must be enabled using the WREN
instruction. The WRSN instruction can be used in burst mode to
write all the 8 bytes of serial number.
The serial number is locked using the SNL bit of the Status
Register. Once this bit is set to '1', no modification to the serial
number is possible. After the SNL bit is set to '1', using the WRSN
instruction has no effect on the serial number.
A STORE operation (AutoStore or Software STORE) is required
to store the serial number in nonvolatile memory. If AutoStore is
disabled, you must perform a Software STORE operation to
secure and lock the serial number. If SNL bit is set to ‘1’ and is
not stored (AutoStore disabled), the SNL bit and serial number
defaults to ‘0’ at the next power cycle. If SNL bit is set to ‘1’ and
is stored, the SNL bit can never be cleared to ‘0’. This instruction
requires the WEN bit to be set before it can be executed. The
WEN bit is reset to '0' after completion of this instruction.
Document #: 001-54392 Rev. *E
Page 17 of 44