W134S Datasheet, PDF (8/12 Pages) Cypress Semiconductor – Direct Rambus Clock Generator

W134M/W134S
Absolute Maximum Conditions^[1]
Parameter
V_{DD, ABS}
V_{I, ABS}
Description
Max. voltage on V_DD with respect to ground
Max. voltage on any pin with respect ground
Min.
Max.
Unit
–0.5
4.0
V
–0.5
V_DD+0.5
V
External Component Values^[2]
Parameter
R_S
R_P
C_F
C_MID
Description
Serial Resistor
Parallel Resistor
Edge Rate Filter Capacitor
AC Ground Capacitor
Min.
39
51
4 – 15^[3]
470 pF
Max.
±5%
±5%
±10%
0.1 µF
Unit
Ω
Ω
pF
±20%
Operating Conditions^[4]
Parameter
V_DD
T_A
t_CYCLE,IN
t_J,IN
DC_IN
FM_IN
PM_IN[6]
t_CYCLE,PD
t_ERR,INIT
DC_IN,PD
t_I,SR
C_IN,PD
DC_IN,PD
C_IN,CMOS
V_IL
V_IH
V_IL,R
V_IH,R
V_IL,PD
V_IH,PD
V_DDIR
V_DDIPD
Description
Supply Voltage
Ambient Operating Temperature
Refclk Input Cycle Time
Input Cycle-to-Cycle Jitter^[5]
Input Duty Cycle over 10,000 Cycles
Input Frequency of Modulation
Modulation Index for Triangular Modulation
Modulation Index for Non-Triangular Modulation
Phase Detector Input Cycle Time at PclkM & SynclkN
Initial Phase error at Phase Detector Inputs
Phase Detector Input Duty Cycle over 10,000 Cycles
Input Slew Rate (measured at 20%-80% of input voltage) for PclkM,
SynclkN, and Refclk
Input Capacitance at PclkM, SynclkN, and Refclk^[7]
Input Capacitance matching at PclkM and SynclkN^[7]
Input Capacitance at CMOS pins (excluding PclkM, SynclkN, and
Refclk)^[7]
Input (CMOS) Signal Low Voltage
Input (CMOS) Signal High Voltage
Refclk input Low Voltage
Refclk input High Voltage
Input Signal Low Voltage for PD Inputs and StopB
Input Signal High Voltage for PD Inputs and StopB
Input Supply Reference for Refclk
Input Supply Reference for PD Inputs
Min.
3.135
0
10
–
40
30
–
–
30
–0.5
25
1
–
–
–
–
0.7
–
0.7
–
0.7
1.235
1.235
Max.
3.465
70
40
250
60
33
0.6
0.5^[8]
100
0.5
75
4
7
0.5
10
0.3
–
0.3
–
0.3
–
3.465
2.625
Unit
V
°C
ns
ps
%t_CYCLE
kHz
%
%
ns
t_CYCLE,PD
t_CYCLE,PD
V/ns
pF
pF
pF
VDD
VDD
V_DDIR
V_DDIR
V_DDIPD
V_DDIPD
V
V
Notes:
1. Represents stress ratings only, and functional operation at the maximums is not guaranteed.
2. Gives the nominal values of the external components and their maximum acceptable tolerance, assuming Z_CH = 28Ω.
3. Do not populate C_F. Leave pads for future use.
4. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
5. Refclk jitter measured at V_DDIR (nom)/2.
6. If input modulation is used: input modulation is allowed but not required.
7. Capacitance measured at Freq=1 MHz, DC bias = 0.9V and V_AC < 100 mV.
8. The amount of allowed spreading for any non-triangular modulation is determined by the induced downstream tracking skew, which cannot exceed the skew
generated by the specified 0.6% triangular modulation. Typically, the amount of allowed non-triangular modulation is about 0.5%.
Document #: 38-07426 Rev. *B
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