CYW43364 Datasheet, PDF (8/68 Pages) Cypress Semiconductor – Single-band 2.4 GHz IEEE 802.11b/g/n

PRELIMINARY
CYW43364
Figure 4. Typical Power Topology (2 of 2)
CYW43364
1.8V, 2.5V, and 3.3V
VBAT
LDO_
VDDBAT5V
LDO3P3 with
Back‐Power
Protection
(Peak 450‐800 mA
200 mA Average)
VOUT_3P3
4.7 uF
3.3V 0402
WLRF_PA_VDD
1 uF
0201
VOUT_3P3
2.5V Cap‐less
LNLDO
(10 mA)
6.4 mA
WL BBPLL/DFLL
WL OTP 3.3V
480 to 800 mA
WL RF—PA (2.4 GHz)
6.4 mA
WL RF—ADC, AFE, LOGEN,
LNA, NMOS Mini‐PMU LDOs
External to chip
Supply ball
Power switch
No power switch
No dedicated power switch, but internal power‐
down modes and block‐specific power switches
Document Number: 002-14781 Rev. *C
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