CY28324_02 Datasheet, PDF (8/23 Pages) Cypress Semiconductor – FTG for Intel® Pentium® 4 CPU and Chipsets

PRELIMINARY
Data Byte 2
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin#
--
17
16
15
14
12
11
10
Reserved
PCI6
PCI5
PCI4
PCI3
PCI2
PCI1
PCI0
Name
Reserved
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
Pin Description
CY28324
Power-On
Default
0
1
1
1
1
1
1
1
Data Byte 3
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin#
8
7
6
--
44, 45
--
1
48
Name
PCI_F2
PCI_F1
PCI_F0
Reserved
3VMREF#, 3VMREF
Reserved
REF1
REF0
Data Byte 4
Bit
Bit 7
Pin#
Name
-- MULTSEL_Override
Bit 6
Bit 5
-- SW_MULTSEL1
-- SW_MULTSEL0
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
-- Reserved
-- Reserved
-- Reserved
-- CPU1 Stop Control
-- CPU0 Stop Control
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
Reserved
(Active/Inactive)
Reserved
(Active/Inactive)
(Active/Inactive)
Pin Description
Power-On
Default
1
1
1
0
1
0
1
1
Pin Description
This bit control the selection of IREF multiplier.
0 = HW control; IREF multiplier is determined by MULT-
SEL[0:1] input pins
1 = SW control; IREF multiplier is determined by Byte[4],
Bit[5:6].
IREF multiplier
00 = Ioh is 4 x IREF
01 = Ioh is 5 x IREF
10 = Ioh is 6 x IREF
11 = Ioh is 7 x IREF
Reserved
Reserved
Reserved
0 = Not free running
1 = Free running; not affected by CPU_STOP#
0 = Not free running
1 = Free running; not affected by CPU_STOP#
Power-On
Default
0
0
0
Reserved
Reserved
Reserved
0
0
Document #: 38-07002 Rev. *B
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